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REVIEW 3 major objections 6 minor 17 references

Exploiting network topology in brain-scale simulations of spiking neural networks

T0 review · 3 major / 6 minor · reviewed 2026-08-02 · deepseek-v4-flash

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Pith's one-line read The slowest compute node, not network bandwidth, sets the pace of brain-scale spiking-network simulations.

desk verdict Solid, honestly-measured paper with a real speed-up and an honest theory-model comparison; the one load-bearing soft spot is the unvalidated delay cutoff that may change the model being simulated. read the letter →

arxiv 2602.23274 v2 pith:GRYL7YRA submitted 2026-02-26 cs.DC q-bio.NC

Melissa Lober , Markus Diesmann , Susanne Kunkel This is my paper
classification cs.DCq-bio.NC
keywords spikingneuralnetworksdistributedsimulationMPIsynchronizationstructure-awaremappingsynapticdelaysmulti-areabrainmodelperformancemodelingweakscaling
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Simulations of brain-scale spiking networks on supercomputers look like they are limited by inter-node communication, but profiling shows the true bottleneck is synchronization: each collective communication call makes faster compute nodes wait for the slowest node. The paper proposes mapping each brain area to a single compute node and exchanging long-range spikes only once every D simulation cycles, exploiting the fact that inter-area synaptic delays are much longer than intra-area delays. A statistical model of cycle-time variability predicts that synchronization time falls by 1/sqrt(D). In benchmarks, the structure-aware scheme cuts total runtime by up to about 30% under weak scaling and by 42% for a realistic macaque visual-cortex model on a large-core system. If right, this shifts optimization effort away from interconnect bandwidth and MPI latency toward workload balance and structure-aware placement.

What carries the argument

The central mechanism is a local-global hybrid communication scheme driven by the integer ratio D = d_inter_min / d_min between the minimum long-range synaptic delay and the overall minimum delay. Each cortical area is assigned to one MPI process; within an area, spikes are exchanged every cycle, while long-range spikes are buffered and globally communicated only every D-th cycle. The statistical model treats per-cycle computation times as normal random variables and shows that lumping D cycles reduces relative dispersion by 1/sqrt(D), so synchronization overhead—the expected maximum over MPI processes—shrinks by the same factor.

What would settle it

Run the same multi-area network twice—once with the natural distribution of inter-area delays and once with the lower cutoff raised to D·d_min—and compare spike-train correlations, firing-rate distributions, and synchrony measures. If the statistics differ materially, the benchmark speed-up cannot be attributed to mapping alone; alternatively, measure per-process cycle times in a network with strongly correlated slow processes to see whether the 1/sqrt(D) prediction fails.

Watch

Extended reading notes

Core claim

On the paper's own terms: the dominant cost in distributed spiking-network simulation is not data transfer or MPI latency but the wait for the slowest process at each collective communication, caused by variability in per-process computation times. Because the minimum synaptic delay between cortical areas is roughly an order of magnitude larger than the minimum delay within an area, a structure-aware distribution that confines each area to one compute node permits global spike exchange only once every D cycles, with local exchange in between. This reduces the coefficient of variation of lumped cycle times by 1/sqrt(D) and lets the slowest node average out over more cycles, while aggregating

Load-bearing premise

The whole speed-up rests on assuming that raising the minimum inter-area synaptic delay to D times the local minimum does not change the network dynamics the simulation is meant to reproduce; the paper supports this only by citing an unpublished thesis, so if the cutoff distorts correlations or firing patterns, part of the gain is bought by changing the model.

Editorial extensions

If this is right

  • Communication optimization in distributed neural simulation should target synchronization frequency and load balance rather than raw interconnect bandwidth or MPI latency.
  • The 1/sqrt(D) prediction means most benefit is already reached at small delay ratios (D around 5–10); further increasing the inter-area delay cutoff yields little additional gain.
  • Structure-aware placement alone improves spike-delivery cache efficiency; the full scheme additionally requires separating short- and long-range connection data, with modest memory overhead.
  • The scheme extends naturally to a future design where each brain area spans multiple compute nodes using MPI groups, regaining load balance while keeping the delay-based communication schedule.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • A direct testable extension is to apply the same D-cycle aggregation to other modular networks—sensory, motor, or artificial—and check whether the 1/sqrt(D) synchronization scaling holds when area sizes and firing rates are varied.
  • The paper's own cycle-time measurements show persistent serial correlations that break the independence assumption; an improved model capturing these correlations could explain the gap between predicted and measured synchronization savings and predict when structure-aware mapping wins.
  • Because the speed-up depends on raising the minimum inter-area delay, re-running the benchmark with the natural delay distribution and comparing spike statistics would separate gains from better mapping versus gains from altering the model.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 6 minor

Summary. The paper identifies synchronization wait time, rather than interconnect bandwidth or MPI latency, as the dominant communication cost in distributed simulations of spiking neural networks. It proposes a structure-aware mapping in which each cortical area is assigned to one MPI process, local spikes are exchanged every simulation cycle, and long-range spikes are buffered and globally exchanged only every D-th cycle, where D is the ratio of the minimal inter-area delay to the global minimal delay. A normal-order-statistics model predicts that synchronization time is reduced by a factor 1/sqrt(D) (Eq. 11), and a cache model predicts fewer irregular synapse accesses. Benchmarks on SuperMUC-NG and JURECA-DC compare conventional and structure-aware strategies for a synthetic MAM-benchmark and the multi-area model of macaque visual cortex, reporting speed-ups up to 30% in weak scaling and 42% for the MAM on JURECA-DC. The authors also report where theory and measurement disagree (CV ratio 0.71 vs. 0.32; synchronization reduction 48% vs. 68%) and attribute the discrepancy to serial correlations in cycle times.

Significance. If the central claims hold, the paper challenges a standard assumption in large-scale neuronal simulation and offers a practical optimization with broad applicability to modular brain models. The strengths are the use of a real model and a controlled benchmark, two HPC systems, three seeds per configuration, phase-resolved timing, and explicit reporting of theory-data mismatches rather than selective presentation. The main weakness is that the dynamic equivalence of the imposed inter-area delay cutoff is not established from published evidence, and no artifact is provided. The result is nevertheless significant: it separates synchronization overhead from data-exchange cost and gives a concrete communication scheme that can be implemented in NEST.

major comments (3)
  1. [§4.2 and Fig. 9] The strategy's central premise is that raising the minimum inter-area delay to d_inter^min = D·d_min does not materially change the simulated network. The paper supports this only by citing an unpublished Master's thesis (Grundler, 2025) and by stating that approximately 16% of all inter-area connections have a delay below 2 ms. For D=10 and d_min=0.1 ms, the cutoff is 1 ms, so a nontrivial part of the inter-area delay distribution is truncated. The conventional-vs-structure-aware comparison in Fig. 9 uses the same modified model on both sides, so the relative speed-up is internally consistent, but the broader claim that the speed-up exploits brain topology rather than a modified delay structure is not established. Please include a quantitative validation of dynamic equivalence, e.g., firing-rate distributions, spike-count CVs, pairwise correlations, and metastable-state indicators, for
  2. [§2.2, Eq. (11), and §2.4.1] The theoretical model assumes independent and identically distributed normal cycle times (Eq. 2), but the paper itself shows that this assumption is violated: the measured cycle times are bimodal and serially correlated (Fig. 12), the CV ratio is 0.71 vs. the predicted 1/sqrt(D)=0.32, and the synchronization-time reduction is 48% vs. the predicted 68%. This is acknowledged, but Eq. (11) is still presented as a quantitative prediction and used to draw conclusions about diminishing returns in Fig. 8(c). The empirical speed-up does not depend on the exact value of Eq. (11), but the theoretical framing should be made precise: either extend the model to incorporate measured serial correlations, or explicitly label Eq. (11) as an idealized upper-bound/heuristic and adjust the wording in the abstract and results accordingly.
  3. [Reproducibility and artifact] No code or data release is provided. The implementation is described as standard NEST 3.6 with modifications, but no patch, benchmark scripts, or generated data are made available. The load-bearing dynamic-equivalence claim rests on an unpublished thesis, and performance numbers depend on many implementation details. I request a public artifact containing the modified NEST code, the benchmark configurations, and the data underlying Figs. 7-9, so that the results can be independently reproduced and the delay-cutoff effect can be examined by the community.
minor comments (6)
  1. [Abstract] The abstract claims the work provides 'guidelines for the energy efficient simulation of neuronal networks,' but no energy measurements are reported. Please either add energy data or qualify the claim to refer to performance and resource efficiency.
  2. [§4.2] Please report the exact fraction of inter-area connections with delays below 1 ms when D=10, not only the fraction below 2 ms. This would make the impact of the cutoff concrete.
  3. [Fig. 12] The color scale and axis labels are hard to read in the appendix figure. It would help to mark the average cycle time and to use a discrete or continuous colorbar with clearer tick labels.
  4. [§4.1.2] The term 'lumped cycle times' is introduced in §2.2 but the transition between t_{m,s} and t_{m,l} is compressed. A short explicit definition before Eq. (5) would improve readability.
  5. [Discussion] There is a typo: 'Instruments were not build for their own sake' should be 'Instruments were not built for their own sake.'
  6. [References] Several references (e.g., Lyu et al., 2024; Berti et al., 2025) are arXiv preprints without journal identifiers. This is acceptable, but please include version numbers and consistent access dates if the paper remains in preprint form.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: theoretical predictions are derived from stated assumptions and tested against measurements, not fitted to them.

full rationale

The paper's central quantitative claim (Eq. 11, E[T_struc_synch]/E[T_conv_synch]=1/sqrt(D)) is a closed-form consequence of the stated iid-normal model (Eqs. 2-6), not an output fitted to the benchmarks; the authors explicitly test it against measured data and report the mismatch (predicted 68% vs measured 48% reduction) caused by serial correlations they acknowledge. The spike-delivery theory (Eqs. 13-17) is likewise an independent combinatorial calculation with no parameters tuned to the observed speed-ups, and the benchmarking section separates the distribution effect from the communication-frequency effect with an intermediate strategy. The MAM benchmarks are measured against a conventional baseline on the same code, so the comparison is not defined into existence. The only notable support gap is Sec. 4.2's assertion that raising d_inter_min has no effect on dynamics, which rests on an unpublished Master thesis (Grundler, 2025); this is an external-validity/assumption risk, not a circular reduction of the derivation to its inputs. Self-citations such as Lober et al. 2024a,b are preliminary abstracts and are not load-bearing.

Assumptions & free parameters 0 free parameters · 6 assumptions · 0 invented entities

No free parameters are fitted to the outcome. The model's predicted synchronization ratio is independent of μ and σ; μ/σ enter only through the order-statistics factor ξ_M and cancel in the ratio. The listed axioms are the assumptions the derivation and implementation rely on.

assumptions (6)
  • ad hoc to paper Cycle times of MPI processes are independent and normally distributed with common mean μ and variance σ² (Eq. 2).
    This is the basis of Eqs. (3)-(11); the paper later shows serial correlations make it false, so predictions are not exact.
  • domain assumption Blocking collective MPI communication forces all processes to synchronize and wait for the slowest process.
    The paper inserts an MPI_Barrier before Alltoall to measure this wait; it is the foundation of the bottleneck diagnosis.
  • domain assumption The minimum inter-area delay d_inter_min is an integer multiple D of d_min and imposing the cutoff does not affect MAM dynamics (Section 4.2).
    The validity of the benchmark as a faithful MAM simulation rests on this; support is an unpublished Master thesis.
  • standard math The expected maximum of M normal draws is approximated by μ + ξ_M σ (Blom order statistics).
    Used in Eqs. (8)-(9) to express the synchronization contribution; ξ_M depends only on M.
  • standard math The central limit theorem applies to sums of D cycle times per process (Eq. 6).
    Requires independence and finite variance; the paper acknowledges the independence condition is violated in measurements.
  • domain assumption Area-to-node mapping can be realized in NEST without kernel changes by controlling neuron creation order and using ghost neurons (Section 4.1.1).
    The implementation of the strategy depends on this property of NEST's round-robin placement; otherwise the approach would require deep kernel changes.

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Pith. "Pith review of Exploiting network topology in brain-scale simulations of spiking neural networks." pith.science (2026). https://pith.science/paper/GRYL7YRA

@misc{pith2026260223274,
  author       = {Pith},
  title        = {Pith review of: Exploiting network topology in brain-scale simulations of spiking neural networks},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/GRYL7YRA}},
  note         = {Machine review of arXiv:2602.23274}
}
read the original abstract

Simulation code for conventional supercomputers serves as a reference for neuromorphic computing systems. The present bottleneck of distributed large-scale spiking neuronal network simulations is the communication between compute nodes. Communication speed seems limited by the interconnect between the nodes and the software library orchestrating the data transfer. Profiling reveals, however, that the variability of the time required by the compute nodes between communication calls is large. The bottleneck is in fact the waiting time for the slowest node. A statistical model explains total simulation time on the basis of the distribution of computation times between communication calls. A fundamental cure is to avoid communication calls because this requires fewer synchronizations and reduces the variability of computation times across compute nodes. The organization of the mammalian brain into areas lends itself to such an optimization strategy. Connections between neurons within an area have short delays, but the delays of the long-range connections across areas are an order of magnitude longer. This suggests a structure-aware mapping of areas to compute nodes allowing for a partition into more frequent communication between nodes simulating a particular area and less frequent global communication. We demonstrate a substantial performance gain on a real-world example. This work proposes a local-global hybrid communication architecture for large-scale neuronal network simulations as a first step in mapping the structure of the brain to the structure of a supercomputer. It challenges the long-standing belief that the bottleneck of simulation is synchronization inherent in the collective calls of standard communication libraries. We provide guidelines for the energy efficient simulation of neuronal networks on conventional computing systems and raise the bar for neuromorphic systems.

Figures

Figures reproduced from arXiv: 2602.23274 by the authors.

Figure 1
Figure 1. Strong-scaling of the multi-area model of macaque visual cortex (MAM) in the ground state. (a) Real time factors, defined as wall-clock time normalized by simulated model time, stacked for each phase of the simulation (legend). All simulations cover Tmodel = 10 s of biological time. Error bars (at line resolution) indicate variability across three simulations using different random seeds. (b) Real time factor of com… view at source ↗
Figure 2
Figure 2. Conventional and structure-aware simulation scheme illustrated for an example multi-area model. Neurons of three areas (middle) are color coded in blue, red, and green. Synaptic transmission delays are significantly shorter within areas than between areas; here, the minimum delays are 0.1 ms and 1.0 ms, respectively. The minimum delay between any pair of neurons represented on two different MPI processes dictates th… view at source ↗
Figure 3
Figure 3. Conventional and structure-aware simulation flow. Flow chart of the iteration over S simulation cycles highlighting differences between the conventional simulation strategy (pink shaded arrow) and the structure-aware strategy (cyan shaded arrows). For every simulation cycle, each MPI process first delivers incoming spikes from the MPI receive buffer to their local target neurons (blue box). Second, each process upda… view at source ↗
Figures from the paper (9 more)
Figure 4
Figure 4. Figure 4: MPI collective performance for increasing message sizes. Time required for a single MPI Alltoall() call (average over 1000 calls) as a function of buffer size when using the OpenMPI library on SuperMUC-NG, shown for increasing numbers of MPI processes as indicated in l…
Figure 5
Figure 5. Figure 5: Graphical intuition of the predicted reduction in overall synchronization time and thus overall runtime in a multi-area model simulation. Illustration of S = 10 simulation cycles on M = 32 MPI processes when using the structure-aware simulation strategy (bottom) instea…
Figure 6
Figure 6. Figure 6: Theoretical analysis explaining the advantage of the structure-aware strategy over the conventional strategy in simulations of multi-area models. (a) Probability distributions underlying the theoretical model of synchronization times. Distributions of cycle times for t…
Figure 7
Figure 7. Figure 7: Performance comparison of conventional and structure-aware simulation strategy. Simulations of the MAM-benchmark with overall minimum delay dmin = 0.1ms and minimum inter-area delay d inter min = 1ms on SuperMUC-NG using one MPI process and TM = 48 threads per compute …
Figure 8
Figure 8. Figure 8: Effect of inter-area variability and delay on the performance of the structure-aware simulation strategy. Simulation of the MAM-benchmark on SuperMUC-NG using M = 64 MPI processes and compute nodes with one area per process. Color scheme, and benchmarking configuration…
Figure 9
Figure 9. Figure 9: Performance comparison of conventional and structure-aware simulation strategy for a real-world network model on two HPC systems. Simulations of the multi-area model of macaque visual cortex (MAM) in the ground state using M = 32 MPI processes and one process per compu…
Figure 10
Figure 10. Figure 10: Fundamental data structures of the reference code NEST. Data structures required per MPI process to store the local connections and enable delivery of spikes to local target connections: connection table (left), source table (middle), and target table (right). The out…
Figure 11
Figure 11. Figure 11: Comparison of strong scaling performance of MAM (a) and MAM-benchmark [PITH_FULL_IMAGE:figures/full_fig_p031_11.png]
Figure 12
Figure 12. Figure 12: Temporal evolution of the cycle time during a MAM-benchmark simulation [PITH_FULL_IMAGE:figures/full_fig_p040_12.png]

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Works this paper leans on

17 extracted references · 2 canonical work pages

  1. [1]

    B., Awile, O., Diesmann, M., Knight, J

    Aimone, J. B., Awile, O., Diesmann, M., Knight, J. C., Nowotny, T. and Sch¨ urmann, F. (2023). Editorial: Neuroscience, computing, performance, and benchmarks: Why it matters to neuroscience how fast we can compute,Front. Neuroinform.17. URL:http://dx.doi.org/10.3389/fninf.2023.1157418 Albers, J., Pronold, J., Kurth, A. C., Vennemo, S., Haghighi Mood, K.,...

    arXiv 2023

  2. [2]

    URL:https://doi.org/10.3389/fninf.2018.00002 Kernighan, B. W. and Lin, S. (1970). An efficient heuristic procedure for partitioning graphs,The Bell System Technical Journal49(2): 291–307. Kozloski, J. and Wagner, J. (2011). An ultrascalable solution to large-scale neural tissue simulation, Front. Neuroinform.5:

    arXiv 2018

  3. [12]

    and Richmond, P

    URL:https://doi.org/10.3389/neuro.11.012.2008 Fernandez-Musoles, C., Coca, D. and Richmond, P. (2019). Communication sparsity in distributed spiking neural network simulations to improve scalability,Front. Neuroinform.V olume 13 -

    work page doi:10.3389/neuro.11.012.2008 2008

  4. [15]

    C., Albers, J., Diesmann, M

    Kurth, A. C., Albers, J., Diesmann, M. and van Albada, S. J. (2025). Cell-type specific projection patterns promote balanced activity in cortical microcircuits,BioRxiv. URL:https://www.biorxiv.org/content/early/2025/04/29/2024.10.03.616539 37 Kurth, A. C., Senk, J., Terhorst, D., Finnerty, J. and Diesmann, M. (2022). Sub-realtime simulation of a neuronal ...

    work page doi:10.1088/2634-4386/ac55fc 2025

  5. [16]

    URL:https://www.frontiersin.org/articles/10.3389/fninf.2020.00016 Zaytsev, Y. V. and Morrison, A. (2014). CyNEST: a maintainable Cython-based interface for the NEST simulator,Front. Neuroinform.8(23). URL:https://doi.org/10.3389/fninf.2014.00023 40 Appendix 0 10000 20000 30000 40000 50000 60000 70000 80000 90000 100000 simulation cycle 0 4 8 12 16 20 24 2...

    arXiv 2020

  6. [32]

    FOR 5880: Holistic Energy and Performance Modeling for Sustainable Computing (Mod4Comp)

    URL:https://doi.org/10.3389/fnins.2011.00032 Deutsche Forschungsgemeinschaft (DFG) (2024). FOR 5880: Holistic Energy and Performance Modeling for Sustainable Computing (Mod4Comp). URL:https://gepris.dfg.de/gepris/projekt/545776403 Diaz-Pier, S., Naveau, M., Butz-Ostendorf, M. and Morrison, A. (2016). Automatic generation of connectivity for large-scale ne...

    arXiv 2011

  7. [34]

    B., Ippen, T., Mørk, H., Jordan, J., Senk, J., Konradi, S., Weidel, P., Fardet, T., Dahmen, D., Terhorst, D., Stapmanns, J., Trensch, G., van Meegen, A., Pronold, J., Eppler, J

    URL:https://doi.org/10.3389/fninf.2017.00034 Hahne, J., Diaz, S., Patronis, A., Schenck, W., Peyser, A., Graber, S., Spreizer, S., Vennemo, S. B., Ippen, T., Mørk, H., Jordan, J., Senk, J., Konradi, S., Weidel, P., Fardet, T., Dahmen, D., Terhorst, D., Stapmanns, J., Trensch, G., van Meegen, A., Pronold, J., Eppler, J. M., Linssen, C., Morrison, A., Sinha...

    arXiv 2017

  8. [57]

    M., Dudani, N., Helias, M., Potjans, T

    URL:https://doi.org/10.3389/fnana.2016.00057 Djurfeldt, M., Hjorth, J., Eppler, J. M., Dudani, N., Helias, M., Potjans, T. C., Bhalla, U. S., Diesmann, M., Hellgren Kotaleski, J. and Ekeberg, O. (2010). Run-time interoperability between neuronal network simulators based on the MUSIC framework,Neuroinformatics8: 43–60. Eppler, J. M., Helias, M., Muller, E....

    arXiv 2016

Show all 17 references
  1. [113]

    URL:https://www.frontiersin.org/article/10.3389/fninf.2010.00113 Herculano-Houzel, S. (2017). Numbers of neurons as biological correlates of cognitive capability,Curr. Opin. Behav. Sci.16: 1–7. Comparative cognition. URL:https://www.sciencedirect.com/science/article/pii/S23521...

    2010 arXiv

  2. [1331]

    and De Schutter, E

    Goddard, N., Hood, G., Howell, F., Hines, M. and De Schutter, E. (2001). Neosim: Portable large- scale plug and play modelling,Neurocomputing38-40: 1657–1661. Computational Neuroscience: Trends in Research

    2001

  3. [1430]

    URL:https://doi.org/10.4249/scholarpedia.1430 Girard, P., Hup´ e, J. M. and Bullier, J. (2001). Feedforward and feedback connections between areas v1 and v2 of the monkey have similar rapid conduction velocities,J. Neurophysiol.85(3): 1328– 36

    2001 doi

  4. [1435]

    and van Albada, S

    URL:https://doi.org/10.1007/s00429-017-1554-4 Schmidt, M., Bakker, R., Shen, K., Bezgin, G., Diesmann, M. and van Albada, S. J. (2018). A multi- scale layer-resolved spiking network model of resting-state dynamics in macaque visual cortical areas,PLOS Comput. Biol.14(10): e100...

    2018 doi

  5. [2001]

    URL:https://www.sciencedirect.com/science/article/pii/S0925231201005288 Grundler, J. (2025).Inferring axonal conduction delays from anatomical data and analyzing their effects on network dynamics in brain-scale simulations of spiking neurons, Master thesis, R WTH Aachen Univer...

    2025

  6. [2013]

    URL:https://www.frontiersin.org/journals/computational-neuroscience/articles/10.3389/fncom.2013.00077 Th¨ ornig, P. (2021). JURECA: Data centric and booster modules implementing the modular supercomputing architecture at J¨ ulich Supercomputing Centre,Journal of large-scale re...

    2013

  7. [2019]

    and Dale, A

    URL:https://www.frontiersin.org/journals/neuroinformatics/articles/10.3389/fninf.2019.00019 Fischl, B. and Dale, A. M. (2000). Measuring the thickness of the human cerebral cortex from magnetic resonance images,Proc. Natl. Acad. Sci. USA97(20): 11050–11055. URL:https://doi.org...

    2019

  8. [2022]

    E., Davison, A

    URL:https://www.frontiersin.org/journals/neuroscience/articles/10.3389/fnins.2022.795876 Plesser, H. E., Davison, A. P., Diesmann, M., Fukai, T., Gemmeke, T., Gleeson, P., Knight, J. C., Nowotny, T., Ren´ e, A., Rhodes, O., Roque, A. C., Senk, J., Schwalger, T., Stadtmann, T.,...

    2022

  9. [2024]

    URL:https://www.icnce-2024.de/abstractsPoster/P138.pdf Lyu, T., Sato, M., Aoki, S., Himeno, R

    P138. URL:https://www.icnce-2024.de/abstractsPoster/P138.pdf Lyu, T., Sato, M., Aoki, S., Himeno, R. and Sun, Z. (2024). Cortex: Large-scale brain simulator utilizing indegree sub-graph decomposition on fugaku supercomputer. URL:https://arxiv.org/abs/2406.03762 Message Passing...

    2024 arXiv

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Reviewed August 2, 2026 · model on record in the stance chip above.