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arxiv: 2603.01271 · v2 · submitted 2026-03-01 · ❄️ cond-mat.mtrl-sci · physics.app-ph

The completed High-Low method for interface state density analysis in MOS capacitors

Pith reviewed 2026-05-15 17:50 UTC · model grok-4.3

classification ❄️ cond-mat.mtrl-sci physics.app-ph
keywords interface state densityMOS capacitorsHigh-Low methodoxide capacitanceaccumulationSiCD_ITband edge
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The pith

An electrostatic constraint derived from MOS theory uniquely determines the correct oxide capacitance and completes the High-Low method for interface state density extraction in accumulation.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper shows that small errors in the user-chosen oxide capacitance have long blocked reliable D_IT measurements in the accumulation region with the High-Low frequency technique. From standard MOS electrostatics the authors derive a constraint that only the physically correct C_OX value can satisfy. When this constraint is imposed, the High-Low procedure becomes mathematically closed and yields consistent D_IT values all the way to the band edge. The method is verified on simulated n-SiC capacitor data and its frequency limits are mapped. The result removes a fundamental barrier to characterizing interface traps near the conduction or valence band edge in MOS structures.

Core claim

The High-Low frequency technique is completed by deriving, from established MOS electrostatic theory, an electrostatic constraint that is uniquely satisfied only by the physically consistent oxide capacitance C_OX; imposing this constraint removes the previous indeterminacy and permits accurate extraction of interface state density D_IT throughout the accumulation energy range.

What carries the argument

An electrostatic constraint derived from MOS capacitor theory that is satisfied only by the correct oxide capacitance value.

If this is right

  • D_IT can now be reported in the accumulation energy range for the first time with the High-Low method.
  • The extraction near the band edge becomes limited only by the highest available measurement frequency rather than by C_OX uncertainty.
  • Simulated n-SiC MOS structures confirm that the completed procedure recovers the input D_IT profile exactly when the correct C_OX is used.
  • Frequency-dependent deviations appear at lower high-frequency limits, mapping the practical operating window of the method.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same constraint could be applied to extract consistent C_OX values from existing published C-V data sets that previously reported only depletion-region D_IT.
  • Wide-bandgap materials such as SiC and GaN, where accumulation D_IT directly affects threshold voltage stability, stand to gain the largest immediate benefit.
  • Device modeling codes could embed the constraint as an internal consistency check during parameter extraction.

Load-bearing premise

The derived constraint admits only one physically realistic solution for oxide capacitance under normal device conditions and that simulated capacitance curves match real measurements without unaccounted parasitics.

What would settle it

Experimental high- and low-frequency C-V curves from a real MOS capacitor for which two or more distinct C_OX values satisfy the derived constraint to within measurement noise.

read the original abstract

Interface state densities, $D_{IT}$, in metal-oxide-semiconductor (MOS) capacitors are rarely reported in the accumulation energy range. It is recognized that the determination of $D_{IT}$ in accumulation is fundamentally obscured by small inaccuracies in the user-defined oxide capacitance, $C_{OX}$. This source of error prevents the High-Low frequency technique from reporting accumulation $D_{IT}$, even for sufficiently fast high-frequency measurements. To resolve this, an electrostatic constraint that is uniquely satisfied by a physically consistent $C_{OX}$ is derived from the established theory, thereby completing the High-Low framework. The "completed" framework's theoretical validity is confirmed using simulated capacitance data for an n-SiC MOS structure, and the method's frequency limitations are demonstrated. This analytical advancement ensures a physically consistent extraction of $D_{IT}$ near the band edge, overcoming a fundamental limitation in MOS capacitor characterization.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

1 major / 1 minor

Summary. The manuscript claims to complete the High-Low frequency method for D_IT extraction in MOS capacitors by deriving an electrostatic constraint from established MOS theory. This constraint is uniquely satisfied only by the physically correct oxide capacitance C_OX, thereby enabling accurate D_IT reporting in the accumulation regime near the band edge. Theoretical validity is shown via simulated capacitance data on an n-SiC structure, with demonstrations of frequency limitations.

Significance. If the uniqueness of the derived constraint holds, the work would remove a fundamental barrier to D_IT characterization in accumulation, extending the utility of the established High-Low technique without introducing new free parameters or ad-hoc assumptions. The simulation-based validation on ideal n-SiC data provides a clean test of the electrostatic derivation.

major comments (1)
  1. [Theoretical derivation and validation sections] The load-bearing claim of uniqueness for the electrostatic constraint (derived in the main theoretical section and validated in the results) is demonstrated only numerically on ideal simulated data. No analytical proof of strict monotonicity or single-root existence is supplied, and the method is untested against realistic parasitics (series resistance, stray capacitance, or quantum corrections in accumulation) that could produce flat regions or multiple roots in the constraint equation.
minor comments (1)
  1. [Abstract] The abstract states that frequency limitations are demonstrated but provides no quantitative range or conditions; adding this detail would improve clarity for readers applying the method.

Simulated Author's Rebuttal

1 responses · 2 unresolved

We thank the referee for the constructive review and for recognizing the potential significance of completing the High-Low method via the electrostatic constraint. We address the single major comment below, acknowledging the limitations of the current numerical validation while defending the core theoretical contribution on ideal data.

read point-by-point responses
  1. Referee: The load-bearing claim of uniqueness for the electrostatic constraint (derived in the main theoretical section and validated in the results) is demonstrated only numerically on ideal simulated data. No analytical proof of strict monotonicity or single-root existence is supplied, and the method is untested against realistic parasitics (series resistance, stray capacitance, or quantum corrections in accumulation) that could produce flat regions or multiple roots in the constraint equation.

    Authors: We agree that uniqueness is established numerically rather than via analytical proof, and that the validation uses only ideal simulated n-SiC capacitance data. The constraint equation is obtained by enforcing charge neutrality and Gauss's law across the oxide-semiconductor interface; it incorporates the solution of Poisson's equation with Fermi-Dirac statistics, which yields a transcendental expression not amenable to a simple closed-form monotonicity proof. The numerical results in the manuscript (a single, well-defined minimum at the physical C_OX) are consistent across the simulated bias range, supporting uniqueness for the ideal case. In revision we will expand the theoretical section with additional numerical sweeps (varying doping, temperature, and frequency) to further illustrate the single-root behavior. For parasitics, the work deliberately isolates the electrostatic derivation on noise-free ideal data to confirm the completion of the High-Low framework without confounding variables. We will add an explicit limitations paragraph noting that series resistance, stray capacitance, and quantum corrections in accumulation could flatten or multi-root the constraint surface in real measurements; users would therefore need to apply standard corrections (e.g., two-terminal de-embedding) before invoking the completed method. We do not claim robustness to un-corrected parasitics. revision: partial

standing simulated objections not resolved
  • Analytical proof of strict monotonicity or single-root existence for the electrostatic constraint
  • Validation of the method on capacitance data that includes realistic parasitics

Circularity Check

0 steps flagged

Derivation from established MOS theory is independent; no reduction to inputs or self-citation chains

full rationale

The paper states that an electrostatic constraint is derived from established theory to uniquely determine C_OX and complete the High-Low D_IT extraction. No equations are shown that define the constraint in terms of the target D_IT values, no parameters are fitted to a data subset and then relabeled as predictions, and no load-bearing uniqueness theorem is imported via self-citation. The provided abstract and description present the step as an analytical derivation from prior MOS capacitance theory rather than a renaming or self-referential fit. Simulations are used only for confirmation, not as the source of the constraint itself. This satisfies the default expectation of a non-circular derivation chain.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

The work rests on standard MOS electrostatic theory without introducing new free parameters or invented entities; the advance is the constraint derivation itself.

axioms (1)
  • domain assumption Established electrostatic theory for MOS capacitors relating capacitance, charge, and interface states
    The constraint is explicitly derived from this body of theory as stated in the abstract.

pith-pipeline@v0.9.0 · 5462 in / 1148 out tokens · 113679 ms · 2026-05-15T17:50:04.823726+00:00 · methodology

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