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arxiv: 2604.21487 · v1 · submitted 2026-04-23 · 📡 eess.SY · cond-mat.mtrl-sci· cs.SY

Monolithically Integrated VO₂ Mott Oscillators for Energy-Efficient Spiking Neurons

Fabio Bersano , Cyrille Masserey , Vanessa Conti , Andrea Iaconeta , Niccolo' Martinolli , Ehsan Ansari , Anna Varini , Igor Stolichnov
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Adrian Mihai Ionescu
This is my paper

Pith reviewed 2026-05-09 20:51 UTC · model grok-4.3

classification 📡 eess.SY cond-mat.mtrl-scics.SY
keywords VO2Mott oscillatorspiking neuronneuromorphic hardwaremonolithic integrationCMOS compatiblememristorenergy efficient
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The pith

Monolithic integration of VO2 Mott devices onto silicon transistors produces spiking neurons that consume as little as 18 pJ per spike.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper shows that thin VO2 films can be deposited at low temperature directly on top of existing silicon transistors to create compact oscillators that generate neuron-like spikes. This is done in a simple one-transistor-one-memristor layout that fits standard chip-making steps. A reader would care because current brain-inspired hardware is usually built from discrete parts or requires exotic processes that prevent dense, low-power systems. The integrated cells reach oscillation frequencies from 40 to 410 kHz, show tunable coupling between devices, and keep memristor power at 8 μW. These results point to a route for embedding oscillatory spiking behavior inside conventional CMOS flows.

Core claim

Fabrication of 60 nm VO2 nanosheets by pulsed-laser deposition below 430 °C on dielectrically isolated SOI junctionless FETs yields functional 1T-1MR cells whose VO2 memristor undergoes Mott insulator-metal transitions to produce gate-tunable oscillations between 40 and 410 kHz. The architecture achieves 18 pJ per spike at room temperature with 8 μW memristor dissipation and potential scaling below 3 μW. Additional behaviors include non-monotonic frequency dependence on current and temperature, bias-dependent stochastic firing, voltage-controlled oscillator operation, and actively tunable resistive coupling between two nano-oscillators.

What carries the argument

The 1T-1MR cell, in which a junctionless FET gates and couples a VO2 memristor that uses its abrupt Mott transition to generate thresholding and sustained oscillation.

If this is right

  • Gate voltage tunes oscillation frequency over a decade from 40 to 410 kHz.
  • Memristor power stays at 8 μW with a path to sub-3 μW operation through scaling.
  • Two oscillators can be resistively coupled and their interaction tuned through the shared JLFET.
  • The same cell supports voltage-controlled oscillator behavior and exhibits stochastic firing under bias.
  • Non-monotonic frequency response to current and temperature creates opportunities for richer oscillator networks.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Successful yield at wafer scale would allow dense arrays of these neurons to be placed alongside conventional logic on the same die.
  • The observed stochastic firing could serve as an on-chip source of randomness for probabilistic or reservoir-style computing without extra hardware.
  • Because the process is back-end-of-line compatible, it could be stacked vertically to increase neuron density beyond planar CMOS limits.
  • Long-term cycling tests would be needed to confirm that the Mott transition survives the millions of spikes required for practical neuromorphic workloads.

Load-bearing premise

The low-temperature deposition of the VO2 layer must leave the underlying transistors undamaged and free of defects that would prevent the memristors from oscillating.

What would settle it

Electrical measurements taken after VO2 deposition that show either no sustained oscillation in the 40-410 kHz range or clear shifts in the JLFET threshold voltage or on-current would disprove successful monolithic integration.

read the original abstract

Brain-inspired non-Boolean computing offers intrinsic error tolerance and parallelism, but its practical deployment is limited by the lack of compact, energy-efficient spiking hardware compatible with large-scale integration. Mott phase-transition materials provide a promising route, as their abrupt insulator-to-metal transitions enable neuron-like thresholding and oscillatory dynamics in compact devices. Among these, vanadium dioxide (VO$_2$) stands out for its near-room-temperature transition, fast switching, and scalability. However, existing VO$_2$-based neuristors rely on discrete components, limiting integration density and system applicability. Here, we report monolithic back-end-of-the-line (BEOL) integration of one-transistor-one-VO2-memristor (1T-1MR) spiking neurons on CMOS-compatible platforms. VO$_2$ nanosheet devices are fabricated by pulsed-laser deposition below 430 {\deg}C on dielectrically isolated silicon-on-insulator (SOI) p-type junctionless field-effect transistors (JLFETs) in a compact 1T-1MR configuration. The architecture exhibits gate-tunable oscillations from 40 to 410 kHz in 60 nm-thick VO$_2$ devices with an active area of 6 $\mu$m$^2$, achieving energy consumption as low as 18 pJ per spike at room temperature, with memristor power dissipation of 8 $\mu$W and potential scaling toward sub-3 $\mu$W operation. We further uncover a non-monotonic dependence of oscillation frequency on current and temperature, along with bias-dependent stochastic firing dynamics, highlighting the rich behavior of integrated VO$_2$ memristor systems. Finally, we demonstrate voltage-controlled oscillator functionality and actively tunable resistive coupling of two nano-oscillators mediated by a JLFET. These results establish a pathway toward dense, energy-efficient, and monolithically integrated Mott-based neuromorphic hardware compatible with CMOS technology.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The manuscript reports monolithic BEOL integration of 1T-1MR spiking neurons by depositing 60 nm VO2 nanosheets via pulsed-laser deposition below 430 °C onto dielectrically isolated SOI p-type JLFETs. The resulting devices show gate-tunable oscillations from 40 to 410 kHz in a 6 μm² active area, with measured energy consumption of 18 pJ per spike at room temperature, 8 μW memristor power dissipation, non-monotonic frequency dependence on current and temperature, bias-dependent stochastic firing, VCO operation, and tunable resistive coupling between two oscillators.

Significance. If the integration is verified without transistor degradation, the work would provide a concrete experimental pathway toward dense, CMOS-compatible Mott-based neuromorphic hardware. The direct measurements of sub-20 pJ spiking and tunable dynamics supply useful benchmarks, and the demonstration of coupling and VCO functions illustrates system-level utility beyond single devices.

major comments (2)
  1. Fabrication and electrical characterization sections: no Id-Vg, subthreshold swing, threshold voltage shift, or mobility data are reported for the JLFETs before versus after the <430 °C PLD VO2 step. This measurement is load-bearing for the central monolithic-integration claim, because any fixed charge, interface traps, or strain could alter JLFET behavior and undermine the assertion that oscillations arise from clean Mott dynamics in an undamaged 1T-1MR stack.
  2. Results on energy and power metrics: the stated 18 pJ/spike and 8 μW values lack accompanying raw traces, integration method, device-to-device statistics, or error bars. Without these, the quantitative performance claims that anchor the energy-efficiency narrative cannot be independently assessed.
minor comments (2)
  1. Figure captions and methods should explicitly state the number of devices measured, the exact voltage and current ranges used for frequency tuning, and the oscilloscope or spectrum-analyzer settings for the reported 40–410 kHz range.
  2. The non-monotonic frequency-versus-current and frequency-versus-temperature behaviors are interesting but would benefit from a brief physical discussion or reference to prior VO2 oscillator models to clarify whether they arise from the Mott transition or from parasitic circuit effects.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their constructive review and for recognizing the potential significance of our monolithic BEOL integration of VO2-based spiking neurons. We address each major comment below and have revised the manuscript to incorporate the requested information.

read point-by-point responses

  1. Referee: Fabrication and electrical characterization sections: no Id-Vg, subthreshold swing, threshold voltage shift, or mobility data are reported for the JLFETs before versus after the <430 °C PLD VO2 step. This measurement is load-bearing for the central monolithic-integration claim, because any fixed charge, interface traps, or strain could alter JLFET behavior and undermine the assertion that oscillations arise from clean Mott dynamics in an undamaged 1T-1MR stack.

    Authors: We agree that a direct before-and-after comparison of JLFET characteristics is essential to substantiate the claim of monolithic integration without transistor degradation. In the revised manuscript we have added Id-Vg and Id-Vd data for the JLFETs measured prior to and following the <430 °C PLD VO2 deposition step, together with extracted values of subthreshold swing, threshold voltage, and mobility. These measurements show that the JLFET performance remains essentially unchanged, confirming that the observed oscillations originate from the VO2 Mott dynamics in an undamaged 1T-1MR stack. revision: yes

  2. Referee: Results on energy and power metrics: the stated 18 pJ/spike and 8 μW values lack accompanying raw traces, integration method, device-to-device statistics, or error bars. Without these, the quantitative performance claims that anchor the energy-efficiency narrative cannot be independently assessed.

    Authors: We acknowledge that additional documentation is required for independent assessment of the energy and power figures. In the revised manuscript we now include representative raw voltage and current waveforms, a detailed description of the integration method (energy per spike obtained by integrating V·I over one oscillation period), device-to-device statistics from multiple devices, and error bars on the reported 18 pJ/spike and 8 μW values. revision: yes

Circularity Check

0 steps flagged

Purely experimental work with no derivations or predictions

full rationale

The paper reports fabrication of 1T-1MR VO2 devices via pulsed-laser deposition on SOI JLFETs, followed by direct electrical measurements of gate-tunable oscillations (40-410 kHz), energy per spike (18 pJ), power dissipation (8 μW), and coupling behavior. No equations, models, fitted parameters, or predictions appear in the abstract or described content. All reported values are presented as measured outcomes rather than derived quantities that reduce to inputs by construction. No self-citations or uniqueness theorems are invoked as load-bearing steps. The work is therefore self-contained as an empirical demonstration without circular reduction.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

Claims rest on successful low-temperature fabrication and electrical measurements of VO2 devices; no mathematical model, free parameters, or new physical entities are introduced.

axioms (1)
  • domain assumption Abrupt insulator-to-metal transition in VO2 produces neuron-like thresholding and oscillatory dynamics in compact devices.
    Invoked to justify use of VO2 for spiking behavior.

pith-pipeline@v0.9.0 · 5700 in / 1205 out tokens · 48230 ms · 2026-05-09T20:51:48.174022+00:00 · methodology

discussion (0)

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