arxiv: 2604.25524 · v1 · submitted 2026-04-28 · 🪐 quant-ph

Recognition: unknown

Defect-Adaptive Lattice Surgery on Irregular Boundary Surface-Code Patches

GunSik Min , Yujin Kang , Jun Heo

Authors on Pith no claims yet

Pith reviewed 2026-05-07 16:51 UTC · model grok-4.3

classification 🪐 quant-ph

keywords surface codelattice surgerydefect-adaptivequantum error correctionGF(2) synthesislogical parityirregular patchesfault-tolerant operations

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The pith

A compact GF(2) synthesis problem reconstructs joint logical parity for lattice surgery on irregular surface-code patches with defects.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

This paper develops a method for lattice surgery on surface-code patches whose boundaries are deformed by defects. It shows how to recover the joint logical parity across the intended seam by combining available measurements with constraints carried over from the pre-merge patches. The recovery is cast as a GF(2) binary-support synthesis problem that either returns a concrete set of gauge outcomes to measure or certifies that the desired parity cannot be obtained. The approach keeps synthesis failure distinct from patch invalidity and handles several defect types in one layer. Circuit-level tests indicate that the resulting operations retain the code distance while adding only modest error overhead relative to perfect-patch merges.

Core claim

We introduce a defect-adaptive lattice-surgery method that reconstructs the target joint logical parity from the seam-related measurements available on the irregular merged patch, together with constraints inherited from the separated pre-merge code space. The reconstruction is expressed as a compact GF(2) binary-support synthesis problem. If the requested parity is realizable, the solution gives an executable parity-extraction rule over raw, schedule-tagged gauge outcomes; otherwise, it certifies a parity-synthesis failure rather than conflating it with patch invalidity. The framework accommodates boundary data-qubit defects, seam-check ancilla defects, and gauge-inferred seam super-checks.

What carries the argument

The GF(2) binary-support synthesis problem that reconstructs the joint logical parity from seam measurements and pre-merge constraints on an irregular merged patch.

If this is right

Improved compile yield for logical operations performed on defective hardware.
Preserved effective distance after the merge operation.
Only modest success-conditioned logical-error overhead compared with defect-free references.
Single synthesis layer that simultaneously handles boundary qubit defects, ancilla defects, and super-checks.
Explicit confirmation of expected transposed-geometry behavior in ZZ-merge sampling.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

The separation of parity synthesis from patch validity could let compilers treat synthesis failure as a distinct, recoverable outcome rather than a hard error.
The same synthesis style might be applied to other logical operations such as braiding or state teleportation on irregular patches.
Hardware tests with controlled defects could directly measure whether the predicted overhead remains modest under realistic noise.
The method points toward a compilation stack in which defect handling is modularized between patch construction and operation scheduling.

Load-bearing premise

All constraints arising from disabled checks, gauge-inferred super-stabilizers, and boundary deformations can be captured inside the GF(2) synthesis without missing error-propagation paths or logical correlations.

What would settle it

Run the synthesized extraction circuit on an irregular patch and check whether the extracted observable matches the true joint logical parity in the zero-error case, or whether an unaccounted logical error appears that the synthesis did not model.

Figures

Figures reproduced from arXiv: 2604.25524 by GunSik Min, Jun Heo, Yujin Kang.

**Figure 1.** Figure 1: FIG. 1 view at source ↗

**Figure 2.** Figure 2: FIG. 2 view at source ↗

**Figure 4.** Figure 4: FIG. 4. Compile yield versus defect rate (XX merge). The view at source ↗

**Figure 3.** Figure 3: FIG. 3. Distance preservation under boundary defects for view at source ↗

**Figure 5.** Figure 5: FIG. 5. Logical performance of the compiled defect-adaptive view at source ↗

**Figure 6.** Figure 6: FIG. 6. Success-conditioned logical error rate for the compiled view at source ↗

read the original abstract

Defect-adaptive surface-code methods have substantially advanced the construction of valid logical patches on imperfect hardware, but fault-tolerant computation also requires executable logical oper ations on the resulting irregular geometries. We formulate the seam-boundary defect problem: how to perform a lattice-surgery merge when the intended seam intersects deformed boundaries, disabled checks, and gauge-inferred super-stabilizers. We introduce a defect-adaptive lattice-surgery method that reconstructs the target joint logical parity from the seam-related measurements available on the irregular merged patch, together with constraints inherited from the separated pre-merge code space. The reconstruction is expressed as a compact GF(2) binary-support synthesis problem. If the requested parity is realizable, the solution gives an executable parity-extraction rule over raw, schedule-tagged gauge outcomes; otherwise, it certifies a parity-synthesis failure rather than conflat ing it with patch invalidity. The framework accommodates boundary data-qubit defects, seam-check ancilla defects, and gauge-inferred seam super-checks within a single synthesis layer. Circuit-level samples of the synthesized merge operation show improved compile yield, preserved effective dis tance, and only modest success-conditioned logical-error overhead relative to the defect-free merge reference; an explicit ZZ-merge sampling check confirms the expected transposed-geometry behav ior under the same success-conditioned observable construction. More broadly, the results identify certified parity synthesis as a compilation layer between defect-adaptive patch construction and executable fault-tolerant logical operations on imperfect surface-code hardware.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Desk Editor's Note private letter to a colleague

The paper reduces defect-adaptive lattice surgery to a GF(2) synthesis task for parity reconstruction on irregular seams, which is a concrete step forward if the equations capture the full dynamics.

read the letter

The main point is that this work formulates the seam-boundary defect problem for lattice surgery merges that hit deformed boundaries, disabled checks, or gauge super-stabilizers, then solves it by casting the target joint parity as a compact GF(2) binary-support synthesis problem. Solutions yield explicit measurement rules over the available seam outcomes plus pre-merge constraints; unsolvable cases get flagged as synthesis failures instead of invalid patches. This covers data-qubit defects, ancilla defects, and seam super-checks in one layer. The sampling data shows better compile yields, preserved effective distance, and only modest logical-error overhead versus defect-free references, with a separate ZZ-merge check confirming the expected transposed behavior. That is useful practical output for anyone compiling logical operations on imperfect hardware. The reduction itself is new relative to the cited lattice-surgery literature and gives a clean separation between patch construction and executable merge rules. The soft spot is whether the static linear equations fully encode every relevant error-propagation path and schedule-dependent correlation that can appear on irregular merged patches. Surface-code stabilizers are linear, but time-ordered circuits on deformed boundaries can produce effective relations that a support-synthesis formulation might miss if not all gauge-inferred or boundary-deformation effects are enumerated. The abstract and high-level description do not include the exact synthesis algorithm or exhaustive verification steps, so the claim that the extracted operator always matches the intended logical parity rests on that completeness. If the full manuscript supplies the derivation and shows no missed paths, the method holds; otherwise the soundness gap is real but not fatal. This is for people working on surface-code fault tolerance and compilation layers for real devices. A reader who needs concrete rules for logical merges around defects will get direct value from the construction and the sampling results. It deserves peer review because it targets a genuine scaling bottleneck with a workable reduction and empirical checks, even if the error-path verification needs tightening.

Referee Report

2 major / 2 minor

Summary. The paper claims to formulate the seam-boundary defect problem for lattice surgery on irregular surface-code patches and introduces a defect-adaptive method that uses a compact GF(2) binary-support synthesis problem to reconstruct the target joint logical parity from seam-related measurements and pre-merge constraints. It certifies parity-synthesis failures and provides circuit-level sampling results indicating improved compile yield, preserved effective distance, and modest success-conditioned logical-error overhead compared to defect-free merges.

Significance. If the central construction holds, this work is significant for enabling fault-tolerant logical operations on defective quantum hardware. It provides a systematic way to handle defects in lattice surgery without invalidating patches, with the GF(2) synthesis offering a certifiable and compact approach. The empirical validation through sampling is a strength, suggesting practical applicability with limited overhead.

major comments (2)

[Formulation of the seam-boundary defect problem] The claim that the GF(2) binary-support synthesis problem fully captures all relevant constraints from disabled checks, boundary deformations, and gauge-inferred super-stabilizers is load-bearing for the method's correctness. The manuscript does not provide the explicit set of linear equations or a verification that no schedule-dependent or higher-weight relations from the time-dependent circuit on the irregular patch are missed, which could lead to extracting an operator differing from the intended logical parity.
[Circuit-level sampling outcomes] The positive results on yield, distance preservation, and error overhead are reported, but without details on the synthesis algorithm implementation, the number of samples, error model parameters, or raw data. This undermines the ability to verify the claims of 'improved compile yield' and 'modest success-conditioned logical-error overhead'.

minor comments (2)

[Abstract] There appear to be typographical spacing errors in the abstract, such as 'oper ations', 'dist ance', and 'behav ior'. These should be corrected for professional presentation.
The paper would benefit from including a small explicit example of the GF(2) synthesis problem with the corresponding matrix and solution to illustrate the method.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their careful reading and constructive feedback, including their recognition of the work's potential significance. We address each major comment below and indicate the revisions planned for the manuscript.

read point-by-point responses

Referee: [Formulation of the seam-boundary defect problem] The claim that the GF(2) binary-support synthesis problem fully captures all relevant constraints from disabled checks, boundary deformations, and gauge-inferred super-stabilizers is load-bearing for the method's correctness. The manuscript does not provide the explicit set of linear equations or a verification that no schedule-dependent or higher-weight relations from the time-dependent circuit on the irregular patch are missed, which could lead to extracting an operator differing from the intended logical parity.

Authors: We agree that the explicit linear equations were not provided in the manuscript and that this omission weakens the verifiability of the central claim. The GF(2) synthesis is assembled from the parity-check matrix of the merged irregular patch (disabled checks contribute zero rows, boundary deformations modify row supports, and gauge-inferred super-stabilizers are added as linear combinations inherited from the pre-merge stabilizers), with the target joint parity as the right-hand side. Schedule-tagged gauge outcomes are intended to incorporate the measurement schedule. To address the concern directly, we will add an appendix containing the explicit matrix construction together with a worked example on a small irregular patch that verifies the extracted operator matches the intended logical parity and that no additional schedule-dependent or higher-weight relations are required. This revision will make the completeness argument explicit. revision: yes
Referee: [Circuit-level sampling outcomes] The positive results on yield, distance preservation, and error overhead are reported, but without details on the synthesis algorithm implementation, the number of samples, error model parameters, or raw data. This undermines the ability to verify the claims of 'improved compile yield' and 'modest success-conditioned logical-error overhead'.

Authors: We concur that the absence of these implementation and sampling details prevents independent verification of the empirical claims. In the revised manuscript we will expand the relevant section to describe the synthesis algorithm (including pseudocode), state the number of samples used, specify the full error model and its parameters, and provide a link or supplementary file containing the raw data and analysis code. These additions will allow readers to reproduce and confirm the reported improvements in compile yield and the modest success-conditioned logical-error overhead. revision: yes

Circularity Check

0 steps flagged

No circularity: new GF(2) synthesis defined directly from measurements and constraints

full rationale

The paper defines a defect-adaptive lattice-surgery reconstruction as a compact GF(2) binary-support synthesis problem that combines seam-related measurements with inherited pre-merge constraints. This formulation is presented as an independent compilation layer without any reduction to fitted parameters, self-referential definitions, or load-bearing self-citations. No equations or steps in the provided abstract or description equate the output parity rule to the input by construction, and the method is explicitly distinguished from patch invalidity certification. The derivation remains self-contained against external benchmarks of surface-code stabilizer linearity.

Axiom & Free-Parameter Ledger

0 free parameters · 2 axioms · 2 invented entities

The method rests on standard surface-code and lattice-surgery assumptions while introducing a new synthesis formulation; no free parameters are fitted and no new physical entities are postulated.

axioms (2)

domain assumption Surface codes remain fault-tolerant when adapted to defects via gauge fixing and super-stabilizers
The synthesis inherits constraints from pre-merge code spaces that rely on this established property.
domain assumption Logical parity can be extracted from a linear combination of gauge outcomes without introducing new logical errors when the combination respects the code space
The GF(2) synthesis problem is built on this standard assumption of stabilizer codes.

invented entities (2)

Seam-boundary defect problem no independent evidence
purpose: To frame the challenge of lattice-surgery merges intersecting deformed boundaries and disabled checks
Newly defined to motivate the synthesis task; no independent experimental evidence provided.
GF(2) binary-support synthesis problem no independent evidence
purpose: To compute executable parity-extraction rules from available seam measurements and inherited constraints
Core algorithmic contribution of the paper; no external validation beyond the described simulations.

pith-pipeline@v0.9.0 · 5569 in / 1707 out tokens · 82928 ms · 2026-05-07T16:51:21.839582+00:00 · methodology

discussion (0)

Reference graph

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The relevant damaged same-type local rows are xA =X A46XA47XA56XA57, x B =X B42XB41XB52XB51

Ideal seam family and damaged local rows For the local seam neighborhood, the defect-freeX- type seam family for theX L ⊗X L merge is e1 =X A17XA27XB11XB21,(B2) e2 =X A37XA47XB31XB41,(B3) e3 =X A57XA67XB51XB61,(B4) e4 =X A77XB71.(B5) The three-defect clusterD={A47, A57, B41}destroys both native seam rowse 2 ande 3. The relevant damaged same-type local row...
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Accepted fused seam super-check and reduced opposite-type constraint We define the fused defect-adapted seam row by ˜e23 ≡e 2e3xAxB.(B12) This equation is a binary-support identity rather than a prescription to measure the damaged native rows di- rectly. The physical execution of the fused row is given by the gauge decomposition in Eq. (B32). Expanding an...
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Certified seam-parity synthesis for Section III C We now instantiate the binary synthesis step of Sec- tion III C. For this worked local witness, we use the active X-basis qX = (A17, A27, B11, B21, A37, A46, A56, A67, B31, B42, B52, B61, A77, B71). (B20) On this basis, the defect-adapted effective seam family is Eeff X ={e 1,˜e23, e4},(B21) with binary ma...
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