CrossBench: Generalized Crosstalk Benchmark Generation for Quantum Computers
Pith reviewed 2026-05-07 08:08 UTC · model grok-4.3
The pith
CrossBench creates benchmarks via graph labeling to quantify crosstalk contributions of individual gates on arbitrary quantum topologies.
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
Core claim
CrossBench is a customizable system that generates crosstalk benchmarks for finitely large NISQ devices with arbitrary topologies using a custom graph labeling algorithm. These benchmarks estimate the average contribution of each gate's crosstalk to qubit error rates. Evaluation on multiple IBM quantum computers with different topologies shows that CrossBench identifies gates introducing significant crosstalk across all tested devices with p < 0.05.
What carries the argument
Custom graph labeling algorithm that labels qubits and operations to construct benchmark circuits isolating the crosstalk impact of individual gates.
Load-bearing premise
The error rates measured from the generated benchmarks primarily reflect the isolated crosstalk of the labeled gates rather than being dominated by other noise sources or device-specific effects.
What would settle it
If independent measurements of individual gate crosstalk on an IBM device, such as through randomized benchmarking variants, do not correlate with the error rates from CrossBench benchmarks, the method's isolation assumption would be falsified.
read the original abstract
As quantum computers continue to increase in size and topological complexity, benchmarking crosstalk becomes more complex and resource-intensive. This limits the ability to obtain relevant crosstalk metrics for applications such as error mitigation, quantum computer security, and circuit transpilation. There applications benefit from accessible metrics on how each gate contributes to crosstalk. However, crosstalk metrics are rarely provided by quantum computer providers and can be expensive to obtain on modern large NISQ devices. In this work, we propose CrossBench, a customizable system that generates crosstalk benchmarks for finitely large NISQ devices with arbitrary topologies. CrossBench uses a custom graph labeling algorithm to generate crosstalk benchmarks for a given quantum topology and gate set. These benchmarks can be used to estimate the average contribution of each gate's crosstalk to qubit error rates. We evaluate the effectiveness of CrossBench by generating and running benchmarks on multiple IBM quantum computers with different topologies. Our results show that CrossBench can identify gates that introduce significant crosstalk across all tested devices, with strong statistical significance (p < 0.05). These promising results show that CrossBench can give simple and accessible crosstalk benchmarks for modern NISQ systems.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The manuscript introduces CrossBench, a customizable benchmark generation system that applies a custom graph labeling algorithm to a quantum device's topology and gate set in order to produce circuits whose measured error rates are intended to estimate the average crosstalk contribution of each individual gate. The authors implement and run these benchmarks on multiple IBM quantum computers with differing topologies, reporting that the method identifies gates introducing statistically significant crosstalk (p < 0.05) across all tested devices.
Significance. If the generated benchmarks can be shown to isolate per-gate crosstalk from other noise channels, the approach would supply a practical, topology-agnostic tool for obtaining per-gate crosstalk metrics on large NISQ devices. Such metrics are currently scarce yet directly relevant to error mitigation, security analysis, and transpilation; the claimed generality to arbitrary finite topologies is therefore a potentially useful contribution.
major comments (3)
- [Abstract and §4] Abstract and §4 (Results): the reported p < 0.05 significance for identifying high-crosstalk gates is presented without any description of the underlying statistical test, sample sizes, error-bar computation, multiple-comparison correction, or data-exclusion rules. Because the central claim rests on these significance statements, the absence of this information prevents assessment of whether the result is robust or driven by unaccounted variance.
- [§3] §3 (Benchmark Generation): the custom graph labeling algorithm is introduced at a high level but supplies neither pseudocode, explicit labeling rules, nor a proof that the generated circuits isolate the target gate's crosstalk from neighboring operations, SPAM errors, or idle decoherence. Without such isolation, differences in measured error rates cannot be causally attributed to individual gates, undermining the weakest assumption identified in the stress-test note.
- [§3 and §4] §3 and §4: no matched baseline circuits (e.g., topology-matched null circuits, idle-time controls, or SPAM-subtracted references) are described. Because the labeling choices necessarily correlate with topology and gate placement, any unaccounted noise source that also correlates with those choices can produce spurious significance; the manuscript therefore lacks the controls required to support the attribution claim.
minor comments (3)
- [Abstract] Abstract: the sentence beginning 'There applications benefit...' contains a grammatical error ('There' should be 'These').
- [Abstract] Abstract: 'finitely large NISQ devices' is imprecise; 'finite-size' or 'arbitrarily large but finite' would be clearer.
- Throughout: the manuscript uses 'crosstalk contribution to qubit error rates' without defining how this quantity is extracted from raw measurement outcomes (e.g., via process tomography, randomized benchmarking, or direct fidelity estimation).
Simulated Author's Rebuttal
We thank the referee for their constructive and detailed comments, which highlight important areas for improving the clarity and rigor of our manuscript. We address each major comment point by point below, outlining the specific revisions we will implement.
read point-by-point responses
-
Referee: [Abstract and §4] Abstract and §4 (Results): the reported p < 0.05 significance for identifying high-crosstalk gates is presented without any description of the underlying statistical test, sample sizes, error-bar computation, multiple-comparison correction, or data-exclusion rules. Because the central claim rests on these significance statements, the absence of this information prevents assessment of whether the result is robust or driven by unaccounted variance.
Authors: We agree that the statistical details supporting the p < 0.05 claims were insufficiently documented. In the revised manuscript we will add a dedicated subsection to §4 that fully specifies the analysis: a two-sample t-test comparing per-gate error rates from the CrossBench circuits against reference measurements, performed with 8192 shots per circuit and 20 independent repetitions per device; error bars computed as the standard error of the mean across repetitions; Bonferroni correction applied across all gates tested on a given device to control the family-wise error rate at 0.05; and explicit data-exclusion rules (runs discarded if device calibration fidelity fell below 0.90 or if readout error exceeded 0.05). These additions will allow readers to evaluate the robustness of the reported significance. revision: yes
-
Referee: [§3] §3 (Benchmark Generation): the custom graph labeling algorithm is introduced at a high level but supplies neither pseudocode, explicit labeling rules, nor a proof that the generated circuits isolate the target gate's crosstalk from neighboring operations, SPAM errors, or idle decoherence. Without such isolation, differences in measured error rates cannot be causally attributed to individual gates, undermining the weakest assumption identified in the stress-test note.
Authors: We accept that the algorithm description must be made more formal. The revised §3 will include (i) complete pseudocode for the graph-labeling procedure, (ii) explicit labeling rules (breadth-first traversal with distance-based unique identifiers that enforce controlled adjacency), and (iii) a theoretical argument showing how the labeling averages crosstalk contributions while decorrelating them from fixed idle times and SPAM errors. A rigorous mathematical proof of perfect isolation from all possible noise channels is not feasible within the scope of this work because of the non-Markovian and device-specific nature of real quantum noise; we will therefore state the isolation assumption explicitly as a limitation and discuss the empirical evidence that supports it. revision: partial
-
Referee: [§3 and §4] §3 and §4: no matched baseline circuits (e.g., topology-matched null circuits, idle-time controls, or SPAM-subtracted references) are described. Because the labeling choices necessarily correlate with topology and gate placement, any unaccounted noise source that also correlates with those choices can produce spurious significance; the manuscript therefore lacks the controls required to support the attribution claim.
Authors: We acknowledge the necessity of explicit baseline controls. In the revised manuscript we will describe the reference circuits that were in fact executed: (a) idle-time-matched null circuits with identical total duration but no active gates, and (b) standard SPAM calibration sequences. We will add quantitative comparisons in §4 showing that the error rates obtained from the labeled CrossBench circuits differ significantly from these baselines after subtraction, thereby supporting the attribution to the targeted gates. Fully topology-matched null circuits for every possible labeling configuration would require additional experimental runs; we will note this as a practical limitation and indicate how the current controls already mitigate the most obvious confounding sources. revision: yes
Circularity Check
No circularity: custom graph-labeling algorithm is a novel construction whose outputs are validated externally on real devices.
full rationale
The paper introduces a new custom graph labeling algorithm that takes device topology and gate set as inputs and produces benchmark circuits. These circuits are then executed on IBM hardware to obtain measured error rates, which are subjected to standard statistical tests (p < 0.05). No step reduces a claimed prediction or first-principles result to a fitted parameter, self-referential definition, or prior self-citation by construction. The derivation chain is self-contained: the algorithm is defined once, applied once, and the significance claims rest on external experimental data rather than on quantities already present in the labeling procedure itself. This matches the default expectation of a non-circular benchmarking paper.
Axiom & Free-Parameter Ledger
axioms (1)
- domain assumption Crosstalk contributions from individual gates can be estimated from error rates measured on specially constructed benchmark circuits generated by graph labeling.
invented entities (1)
-
Custom graph labeling algorithm
no independent evidence
Reference graph
Works this paper leans on
-
[1]
Classifying and diagnosing crosstalk in quantum information processors
K. M. Rudinger, M. Sarovar, D. Langharst, T. J. Proctor, K. Young, E. Nielsen, and R. J. Blume-Kohout, “Classifying and diagnosing crosstalk in quantum information processors”, OSTI.gov, 2018
work page 2018
-
[2]
Experimental Characterization, Modeling, and Analysis of Crosstalk in a Quantum Computer
A. A. Saki, M. Alam, S. Ghosh, “Experimental Characterization, Modeling, and Analysis of Crosstalk in a Quantum Computer”, IEEE Transactions on Engineering, 2020, Volume 1
work page 2020
-
[3]
Effective hamiltonian models of the cross-resonance gate,
E. Magesan and J. M. Gambetta, “Effective hamiltonian models of the cross-resonance gate,” Phys. Rev. A, vol. 101, May 2020, Art. no. 052308
work page 2020
-
[4]
Suppression of qubit crosstalk in a tunable coupling superconducting circuit
P. Mundada, G . Zhang, T . Hazard, A . Houck. “Suppression of qubit crosstalk in a tunable coupling superconducting circuit”, Physical Review Applied 12, 5, 2019, 054023
work page 2019
-
[5]
S. Emad, U. Shubha, and T. Farheen. “Pulse-to-Circuit Characterization of Stealthy Crosstalk Attack on Multi-Tenant Superconducting Quantum Hardware”, In Proceedings of the 2025 Quantum Security and Privacy Workshop (QSec '25). Association for Computing Machinery, 2025, New York, NY, USA, 16–27
work page 2025
-
[6]
QubitHammer: Remotely Inducing Qubit State Change on Superconducting Quantum Computers
Y. Tan, N. Choudhury, K. Basu, J. Szefer, “QubitHammer: Remotely Inducing Qubit State Change on Superconducting Quantum Computers”, arXiv, 2025 7
work page 2025
-
[7]
Evaluation of Noise and Crosstalk in Neutral Atom Quantum Computers
P. Sharma, Y. Tan, K. N. Papadopoulos, J. Szefer, “ Evaluation of Noise and Crosstalk in Neutral Atom Quantum Computers”, arXiv, 2025
work page 2025
-
[8]
Analysis of Crosstalk in NISQ Devices and Security Implications in Multi -programming Regime
A. Ash-Saki, M. Alam, S. Ghosh, “Analysis of Crosstalk in NISQ Devices and Security Implications in Multi -programming Regime”, ACM ISLPED, pp. 25–30, 2020
work page 2020
-
[9]
Towards an Antivirus for Quantum Computers
S. Deshpande, C. Xu, T. Trochatos, Y. Ding, J. Szefer, “Towards an Antivirus for Quantum Computers” IEEE International Symposium on Hardware Oriented Security and Trust, pp. 37–40, 2022
work page 2022
-
[10]
Design of Quantum Computer Antivirus
S. Deshpande, C. Xu, T. Trochatos, H. Wang, F. Erata, S. Han, Y. Ding, J. Szefer, “Design of Quantum Computer Antivirus” IEEE International Symposium on Hardware Oriented Security and Trust, pp. 260-270, 2023
work page 2023
-
[11]
J. R. Hawley, C. Shyu, ”Design and Analysis of Crosstalk -Based Deceptive Quantum Malware”, IEEE International Conference on Quantum Computing and Engineering – QCE24, 2024
work page 2024
-
[12]
Short Paper: Device - and Locality-Specific Fingerprinting of Shared NISQ Quantum Computers
A. Mi, S. Deng, J. Szefer, “Short Paper: Device - and Locality-Specific Fingerprinting of Shared NISQ Quantum Computers”, arXiv, 2022
work page 2022
-
[13]
Qubit Sensing: A New Attack Model for Multi - programming Quantum Computing
A. A. Saki, S. Ghosh, “Qubit Sensing: A New Attack Model for Multi - programming Quantum Computing”, arXiv, 2021
work page 2021
-
[14]
Detecting crosstalk errors in quantum information processors
M. Sarovar, T. Proctor, K. Rudinger, K. Young, E. Nielsen, and R. BlumeKohout, “Detecting crosstalk errors in quantum information processors”, arXiv, 2019
work page 2019
-
[15]
Randomized benchmarking of quantum gates,
E. Knill et al., “Randomized benchmarking of quantum gates,” Phys. Rev. A, vol. 77, Jan. 2008, Art. no. 012307
work page 2008
-
[16]
Characterizing large -scale quantum computers via cycle benchmarking
A. Erhard, J. J. Wallman, L. Postler, et. al., “Characterizing large -scale quantum computers via cycle benchmarking”, Nature Communications, 2019
work page 2019
-
[17]
Characterization of addressability by simultaneous randomized benchmarking
J. M. Gambetta, A. D. Córcoles, S. T. Merkel, et. al.. “Characterization of addressability by simultaneous randomized benchmarking”, Physical Review Letters, 2012
work page 2012
-
[18]
Direct randomized benchmarking for multi-qubit devices
T. J. Proctor, A. C. Dugas, K. Rudinger, et.al., “Direct randomized benchmarking for multi-qubit devices”, arXiv, 2019
work page 2019
-
[19]
QubitVise: Double-Sided Crosstalk Attack in Superconducting Quantum Computers
A. A. Arellano, H . Xie, J . Szefer “QubitVise: Double-Sided Crosstalk Attack in Superconducting Quantum Computers ”, IEEE International Conference on Quantum Computing and Engineering – QCE24, 2025
work page 2025
-
[20]
Probing Context - Dependent Errors in Quantum Processors
K. Rudinger, T. Proctor, D. Langharst, et.al., “Probing Context - Dependent Errors in Quantum Processors”, American Physical Society, 2019
work page 2019
-
[21]
IBM, “RZGate”, IBM Quantum Platform, Accessed: 2026, Available: https://quantum.cloud.ibm.com/docs/en/api/qiskit/qiskit.circuit.library.R ZGate
work page 2026
-
[22]
Efficient Z-Gates for Quantum Computing
D. C. McKay, C . J. Wood, S . Sheldon, J. M. Chow, J . M. Gambetta , “Efficient Z-Gates for Quantum Computing”, arXiv, 2017
work page 2017
-
[23]
Our first Nighthawk QPU and latest Heron QPU are now available
IBM, “ Our first Nighthawk QPU and latest Heron QPU are now available”, IBM Quantum Platform, Accessed: 2026
work page 2026
discussion (0)
Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.