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arxiv: 2606.01852 · v1 · pith:NR2JSFJ3new · submitted 2026-06-01 · 💻 cs.DC · quant-ph

Parallelizing Large-Scale Tensor Network Contraction on Multiple GPUs

Feng Pan , Hanfeng Gu , Paul Springer , Xipeng Li This is my paper

Pith reviewed 2026-06-28 12:51 UTC · model grok-4.3

classification 💻 cs.DC quant-ph
keywords tensor network contractionmulti-GPU parallelizationdistributed tensor contractionquantum circuit simulationslicingGEMM reorderingcommunication-aware scheduling
0
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The pith

Distributing intermediate tensors across GPUs with explicit communication converts a fixed contraction path into a schedule that beats slicing by orders of magnitude.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper establishes that slicing, the standard way to parallelize tensor network contraction, incurs exponential redundant computation. Instead, the authors convert any fixed contraction path into a communication-efficient schedule by reordering modes for matrix multiplication and planning how to distribute tensor modes across devices. On eight H100 GPUs linked by NVLink this approach captures 87 to 101 percent of the available compute reduction, delivering 7 to 173 times the speedup of slicing alone. When the same workloads are scaled to 1024 GPUs over InfiniBand the advantage grows to between 42 and 67,869 times. The result matters for any domain that relies on exact contraction of large tensor networks, because it removes the exponential barrier that has limited prior parallel methods.

Core claim

We present a multi-GPU framework that distributes intermediate tensors across devices with explicit communication, converting a fixed contraction path into a communication-efficient schedule via GEMM-oriented mode reordering and communication-aware mode distribution planning. Within a single DGX H100 node (8 GPUs, NVLink), distribution delivers 7--173× extra speedup beyond embarrassingly parallel slicing, capturing nearly all of the available compute reduction (87--101%) because NVLink's high bandwidth keeps communication small relative to compute. Scaling the same four workloads to 1024 H100 GPUs over InfiniBand, the extra speedup beyond slicing ranges from 42× to 67,869×, demonstrating tha

What carries the argument

GEMM-oriented mode reordering combined with communication-aware mode distribution planning, which turns any fixed contraction path into a schedule that moves only the data required for each distributed matrix multiplication.

If this is right

  • On NVLink-connected GPUs the method captures 87-101% of the theoretical compute reduction available from avoiding slicing redundancy.
  • The same four workloads that are limited by slicing on 1024 GPUs become feasible when distribution is used instead.
  • Communication overhead remains small enough that the approach continues to scale when moving from a single node to a full InfiniBand cluster.
  • The framework applies directly to the contraction workloads that appear in quantum circuit simulation and combinatorial optimization.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same mode-reordering and distribution logic could be applied to tensor networks that arise in classical machine-learning models whose contraction graphs are currently handled by slicing.
  • If the planning step can be made dynamic rather than static, the method might adapt to tensor networks whose optimal contraction paths change during execution.
  • The reported scaling behavior implies that further increases in GPU count will continue to favor communication-aware distribution over slicing as long as interconnect bandwidth grows with compute.
  • Because the schedule preserves the original contraction path, existing path-finding heuristics can be reused without modification.

Load-bearing premise

Any fixed contraction path can be turned into a communication-efficient schedule by reordering modes for matrix multiplication and planning their distribution while keeping communication volume small relative to the compute that is saved.

What would settle it

Run one of the four reported workloads on 1024 GPUs and measure whether total communication time plus any extra compute exceeds the reduction in redundant floating-point operations compared with slicing; if the net time is longer, the claimed speedups do not hold.

Figures

Figures reproduced from arXiv: 2606.01852 by Feng Pan, Hanfeng Gu, Paul Springer, Xipeng Li.

Figure 1
Figure 1. Figure 1: Theoretical complexity reduction from distributing intermediate tensors across GPUs for six workloads: (a) quantum circuit simulation (Zuchongzhi [PITH_FULL_IMAGE:figures/full_fig_p005_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: End-to-end workflow. The offline planner takes a fixed contraction [PITH_FULL_IMAGE:figures/full_fig_p006_2.png] view at source ↗
Figure 4
Figure 4. Figure 4: Slicing vs. distribution. (a) Slicing fixes indices to create independent [PITH_FULL_IMAGE:figures/full_fig_p007_4.png] view at source ↗
Figure 3
Figure 3. Figure 3: GEMM-oriented mode reordering on a two-step subtree. Dashed edges [PITH_FULL_IMAGE:figures/full_fig_p007_3.png] view at source ↗
Figure 5
Figure 5. Figure 5: DP redistribution-point selection for the Zuchongzhi n60m24 bench [PITH_FULL_IMAGE:figures/full_fig_p008_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: Projected full-contraction speedup vs. embarrassingly parallel slicing (dashed) on 1–1024 H100 GPUs, computed from measured per-slice runtime [PITH_FULL_IMAGE:figures/full_fig_p010_6.png] view at source ↗
read the original abstract

Exact tensor network contraction underpins quantum circuit simulation, quantum error correction, combinatorial optimization, and many-body dynamics. The dominant parallelization strategy, slicing, scales exponentially and incurs redundant computation. We present a multi-GPU framework that instead distributes intermediate tensors across devices with explicit communication, converting a fixed contraction path into a communication-efficient schedule via GEMM-oriented mode reordering and communication-aware mode distribution planning. Within a single DGX H100 node (8 GPUs, NVLink), distribution delivers $7$--$173\times$ extra speedup beyond embarrassingly parallel slicing, capturing nearly all of the available compute reduction (87--101%) because NVLink's high bandwidth keeps communication small relative to compute. Scaling the same four workloads to 1024 H100 GPUs over InfiniBand, the extra speedup beyond slicing ranges from $42\times$ to $67{,}869\times$, demonstrating that communication-aware distributed contraction far surpasses slicing-based scaling limits for frontier tensor networks.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

1 major / 0 minor

Summary. The manuscript presents a multi-GPU framework for exact tensor network contraction that distributes intermediate tensors with explicit communication rather than relying on slicing. A fixed contraction path is converted into a communication-efficient schedule via GEMM-oriented mode reordering and communication-aware mode distribution planning. On four workloads within a single DGX H100 node (8 GPUs, NVLink), the approach yields 7--173× extra speedup beyond embarrassingly parallel slicing while capturing 87--101% of the available compute reduction; scaling the same workloads to 1024 H100 GPUs over InfiniBand produces extra speedups ranging from 42× to 67,869×.

Significance. If the empirical results hold under detailed verification, the work would be significant for distributed tensor computations in quantum simulation and related domains. It demonstrates that communication-aware distribution can largely eliminate the redundant compute of slicing while keeping communication overhead low relative to compute savings on both NVLink and InfiniBand, offering a practical path to larger-scale contractions than slicing-based methods allow.

major comments (1)
  1. [Abstract] Abstract: the quantitative claims (7--173× on-node, 87--101% capture, 42×--67,869× at 1024 GPUs) are stated without workload definitions, implementation details, error analysis, or verification steps. These elements are load-bearing for assessing support for the central empirical claim that the GEMM-oriented reordering plus distribution planning keeps communication cost small relative to avoided redundant compute.

Simulated Author's Rebuttal

1 responses · 0 unresolved

Thank you for the constructive feedback. We address the single major comment below and agree that enhancing the abstract will improve clarity without altering the manuscript's core contributions.

read point-by-point responses

  1. Referee: [Abstract] Abstract: the quantitative claims (7--173× on-node, 87--101% capture, 42×--67,869× at 1024 GPUs) are stated without workload definitions, implementation details, error analysis, or verification steps. These elements are load-bearing for assessing support for the central empirical claim that the GEMM-oriented reordering plus distribution planning keeps communication cost small relative to avoided redundant compute.

    Authors: We acknowledge the abstract's conciseness omits these details, which are present in the body. Workloads are defined in Section 4.1 (four quantum circuit simulation networks with explicit tensor dimensions and paths). Implementation (GEMM reordering and distribution planning) is in Section 3. Error analysis (multi-run timings) and verification (87-101% capture vs. theoretical reduction) appear in Section 5. To address the concern directly, we will revise the abstract to add brief workload descriptors (e.g., 'four 20-40 qubit quantum simulation workloads') and parenthetical references to the relevant sections. This change supports the empirical claims without misrepresenting results. revision: yes

Circularity Check

0 steps flagged

No significant circularity

full rationale

The paper's central claims consist of measured speedups (7-173× on-node, 42-67869× at 1024 GPUs) obtained by running four specific workloads on DGX H100 hardware under the proposed GEMM-oriented reordering and communication-aware distribution. These are direct empirical timings, not quantities derived from a fitted model, self-referential definition, or self-citation chain. The method description (mode reordering plus distribution planning) is presented as an algorithmic technique whose correctness and efficiency are verified by the reported measurements rather than presupposed by them. No load-bearing step reduces to its own inputs by construction.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Abstract supplies no explicit free parameters, axioms, or invented entities; evaluation is limited by absence of full text.

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