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arxiv: 2606.03677 · v1 · pith:JQUZVB7Nnew · submitted 2026-06-02 · ⚛️ physics.app-ph · cond-mat.mtrl-sci

20 ps Non-Destructive Read and 1 ns Write Operations at <5 V in Ferroelectric HfO2/ZrO2 Non-Volatile Memories

Alexandre Baigol , Ruben Hamming-Green , Paul Uriarte Vicandi , Jiajie Gao , Till Zellweger , Anwesha Panda , Alexandros Emboras , Mikl\'os Csontos
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Mathieu Luisier Beatriz Noheda Laura B\'egon-Lours
This is my paper

Pith reviewed 2026-06-28 07:23 UTC · model grok-4.3

classification ⚛️ physics.app-ph cond-mat.mtrl-sci
keywords ferroelectric memoryHfO2/ZrO2non-destructive readoutmemcapacitanceleakage currentultrafast readlow-voltage programmingnon-volatile memory
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The pith

Ferroelectric HfO2/ZrO2 capacitors achieve 20 ps non-destructive reads by sensing polarization-dependent leakage current below the RC time constant.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper integrates HfO2/ZrO2 ferroelectric nanolayers to demonstrate multi-level programming in 1 ns at voltages under 5 V. Partial switching produces memcapacitance states with endurance above 10^11 cycles and 10-year retention, yet the standard capacitance readout window collapses above 1 MHz. To bypass this limit the authors apply 20 ps pulses shorter than the device RC time constant and measure a leakage current that varies with stored polarization, enabling non-destructive readout at 14 fJ. A sympathetic reader would care because the combination supports fast, low-voltage, high-endurance ferroelectric devices needed for analog in-memory computing.

Core claim

The paper establishes that polarization-dependent leakage current can be measured with electrical pulses down to 20 ps in HfO2/ZrO2 ferroelectric capacitors, providing ultrafast non-destructive readout at speeds where the memcapacitance window collapses while also showing nanosecond multi-level switching below 5 V, endurance above 10^11 cycles from partial switching, and 10-year retention.

What carries the argument

Polarization-dependent leakage current measured with pulses shorter than the RC time constant of the ferroelectric capacitor.

If this is right

  • Multi-level writes occur in 1 ns at programming voltages below 5 V in BEOL-integrated devices.
  • Partial switching yields endurance above 10^11 cycles while preserving 10-year retention in memcapacitance states.
  • Non-destructive readout becomes possible above 1 MHz where the standard memcapacitance window collapses.
  • Read energy reaches 14 fJ per operation with the leakage-current method.
  • The approach works for capacitors fabricated both on SiO2/Si and in CMOS back-end-of-line.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The leakage-current readout may generalize to other ferroelectric thin films if polarization dependence of leakage is not unique to HfO2/ZrO2.
  • BEOL compatibility implies these devices can be stacked directly on logic without new process modules.
  • 14 fJ reads suggest dense arrays could operate without significant power or heat penalties in analog computing hardware.
  • Testing pulses shorter than 20 ps would reveal whether the sub-RC leakage method has a fundamental speed floor.

Load-bearing premise

The leakage current during the 20 ps pulse must depend on the ferroelectric polarization state, remain distinguishable from other currents, and leave that state undisturbed.

What would settle it

Repeated application of 20 ps read pulses produces identical leakage current independent of prior polarization state or visibly alters the stored polarization.

Figures

Figures reproduced from arXiv: 2606.03677 by Alexandre Baigol, Alexandros Emboras, Anwesha Panda, Beatriz Noheda, Jiajie Gao, Laura B\'egon-Lours, Mathieu Luisier, Mikl\'os Csontos, Paul Uriarte Vicandi, Ruben Hamming-Green, Till Zellweger.

Figure 1
Figure 1. Figure 1: Shared process-flow for the fabrication of FeCaps integrated in the BEOL of XFAB 180 nm CMOS and on SiO2 with schematic cross￾sections. Prior to ALD, CMOS wafers are treated with O2 plasma. © 2026 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promo… view at source ↗
Figure 3
Figure 3. Figure 3: FIB-SEM cross-section of a 1 µm2 device showing agreement between nominal and experimental dimensions [PITH_FULL_IMAGE:figures/full_fig_p002_3.png] view at source ↗
read the original abstract

Achieving low-voltage, nanosecond multi-level programming and non-destructive read-out of ferroelectric non-volatile memories (NVM) is critical for analog in-memory computing architectures relying on ferroelectric capacitive devices (FeCap). We integrate HfO2/ZrO2 ferroelectric nanolayers concurrently in the BEOL of CMOS and on SiO2/Si, achieving nanosecond multilevel switching with programming voltages below 5 V. Partial ferroelectric switching enhances FeCap endurance above 1011 cycles, leading to MemCapacitance (MC) states with non-destructive read-out and 10-year retention. However, experiments reveal the collapse of the MC window for read frequencies above 1 MHz. To overcome this speed limit, we introduce a novel, non-destructive readout methodology. Using electrical pulses with widths down to 20 ps, below the RC time constant of the FeCaps, we enable measurement of the polarization-dependent leakage current, providing ultrafast and non-destructive read operations at only 14 fJ.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The manuscript reports integration of HfO2/ZrO2 ferroelectric nanolayers in BEOL CMOS and on SiO2/Si, achieving <5 V nanosecond multilevel switching, >10^11 cycle endurance via partial ferroelectric switching for MemCapacitance (MC) states with 10-year retention, and a novel non-destructive readout using 20 ps electrical pulses (below the FeCap RC time constant) to measure polarization-dependent leakage current at 14 fJ, overcoming MC window collapse above 1 MHz.

Significance. If the central performance claims hold with supporting data, this would advance low-voltage, high-speed ferroelectric capacitive devices for analog in-memory computing by demonstrating ultrafast non-destructive read and high endurance, with falsifiable predictions on leakage-based readout and partial-switching endurance.

major comments (2)
  1. [ultrafast readout methodology] The ultrafast readout section: the claim that 20 ps pulses enable measurement of polarization-dependent leakage current (distinct from displacement current) lacks described equivalent-circuit decomposition, identical-geometry non-ferroelectric control capacitors, or post-pulse P-E loop verification to confirm the read operation leaves stored polarization unchanged; this is load-bearing for the 14 fJ non-destructive read at >1 MHz.
  2. [endurance and MC characterization] Endurance and MC state results: the >10^11 cycle claim with partial switching requires device statistics, error bars, and explicit conditions (voltage, pulse width) to support the cross-frequency MC window data; without these the collapse above 1 MHz and its mitigation rest on unquantified observations.
minor comments (2)
  1. [methods] Figure captions and methods should specify pulse generator bandwidth, probe parasitics, and exact RC time constant extraction to allow reproduction of the 20 ps regime.
  2. [abstract] The abstract states performance metrics (20 ps, 1 ns, 14 fJ, >10^11) without reference to the corresponding figures or tables; cross-references would improve clarity.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their constructive feedback on our manuscript. We address each major comment below and have made revisions to strengthen the supporting evidence for the central claims.

read point-by-point responses

  1. Referee: The ultrafast readout section: the claim that 20 ps pulses enable measurement of polarization-dependent leakage current (distinct from displacement current) lacks described equivalent-circuit decomposition, identical-geometry non-ferroelectric control capacitors, or post-pulse P-E loop verification to confirm the read operation leaves stored polarization unchanged; this is load-bearing for the 14 fJ non-destructive read at >1 MHz.

    Authors: We agree that additional methodological details are needed to substantiate the polarization-dependent leakage current readout. In the revised manuscript, we have added an equivalent-circuit analysis demonstrating that sub-RC-time-constant pulses isolate the leakage component from displacement current. We also include measurements on identical-geometry non-ferroelectric control capacitors showing the absence of the polarization-dependent effect, as well as post-read P-E loop data confirming that the 20 ps pulses leave the stored polarization state unchanged. These additions directly support the 14 fJ non-destructive read claim at frequencies above 1 MHz. revision: yes

  2. Referee: Endurance and MC state results: the >10^11 cycle claim with partial switching requires device statistics, error bars, and explicit conditions (voltage, pulse width) to support the cross-frequency MC window data; without these the collapse above 1 MHz and its mitigation rest on unquantified observations.

    Authors: We acknowledge that the endurance and MC characterization section would benefit from greater statistical rigor. The revised manuscript now reports data from multiple devices with error bars, along with the explicit voltage amplitudes and pulse widths used for the partial-switching endurance tests exceeding 10^11 cycles. The cross-frequency MC window measurements, including the observed collapse above 1 MHz and its mitigation via the new readout method, are now presented with these quantified conditions and statistics. revision: yes

Circularity Check

0 steps flagged

No circularity: experimental claims rest on measurements, not self-referential derivations or fitted inputs.

full rationale

The manuscript presents device fabrication, electrical characterization, and a proposed readout method based on short-pulse current measurements. No equations, parameter fits, or derivations are described that reduce a claimed result to its own inputs by construction. The central claim (polarization-dependent leakage extracted from 20 ps pulses) is an experimental assertion whose validity depends on controls and separation of current components, not on any algebraic identity or self-citation chain internal to the paper. Self-citations, if present, are not load-bearing for any quantitative prediction. This is the expected outcome for a purely experimental report.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Abstract-only review contains no mathematical derivations, fitted parameters, or postulated entities; the central claims rest on experimental observations whose details are not provided.

pith-pipeline@v0.9.1-grok · 5770 in / 1091 out tokens · 24150 ms · 2026-06-28T07:23:30.895395+00:00 · methodology

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Reference graph

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