Paper Citation Record · LEDGER

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA

As of 20 August 2026, this Paper Citation Record lists 15 of 15 outbound references and 0 inbound Pith citation observations for arXiv:2606.25562.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2606.25562 v1

Coverage vector

measured 15 of 15 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-06-25T19:39:19.171282Z

measured 15 of 15 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-20T06:33:59.587034+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

15 of 15 outbound references displayed

verified exact1
verified fuzzy0
unresolved14
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation f4763cd4-a30b-4553-a559-cf642b952cb6 · outbound

This paper cites Medical image segmentation review: The success of u-net,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Medical image segmentation review: The success of u-net,

Reference 1

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation db6e5c8e-8054-4a44-a426-5606365b2acb · outbound

This paper cites Efficient hardware design of a deep u-net model for pixel-level ecg classification in healthcare device,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Efficient hardware design of a deep u-net model for pixel-level ecg classification in healthcare device,

Reference 2

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b03e505c-fad8-4dcf-809b-e789658ba6ee · outbound

This paper cites Review of neural network model acceleration techniques based on fpga platforms,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Review of neural network model acceleration techniques based on fpga platforms,

Reference 3

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4583959b-dcfc-4291-8fa7-05f70aba286c · outbound

This paper cites Appq-cnn: An adaptive cnns inference accelerator for syn- ergistically exploiting pruning and quantization based on fpga,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Appq-cnn: An adaptive cnns inference accelerator for syn- ergistically exploiting pruning and quantization based on fpga,

Reference 4

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ccef20cd-8668-48df-a9e7-cf8822f28a2d · outbound

This paper cites Bitmac: Bit-serial computation- based efficient multiply-accumulate unit for dnn accelerator,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Bitmac: Bit-serial computation- based efficient multiply-accumulate unit for dnn accelerator,

Reference 5

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation fc40b614-7808-48da-86cc-b8d081fc5723 · outbound

This paper cites Bitcluster: Fine-grained weight quantization for load- balanced bit-serial neural network accelerators,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Bitcluster: Fine-grained weight quantization for load- balanced bit-serial neural network accelerators,

Reference 6

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c5db833f-4774-458d-8713-0d5102672ec9 · outbound

This paper cites Usefuse: Uniform stride for enhanced performance in fused layer architecture of deep neural networks,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Usefuse: Uniform stride for enhanced performance in fused layer architecture of deep neural networks,

Reference 7

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2aa5e1fb-bdd7-4de3-be4a-755b45a9b6bd · outbound

This paper cites Low-latency online multiplier with reduced activities and mini- mized interconnect for inner product arrays,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Low-latency online multiplier with reduced activities and mini- mized interconnect for inner product arrays,

Reference 8

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 27e8a503-68e7-4105-8462-b6102addd8e8 · outbound

This paper cites On-cnn: Low latency and high throughput online arithmetic based convolutional neural network accelerator,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA On-cnn: Low latency and high throughput online arithmetic based convolutional neural network accelerator,

Reference 9

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 980c8627-f000-4830-9a1a-f9801b295e66 · outbound

This paper cites An efficient dot-product unit based on online arithmetic for variable precision applications,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA An efficient dot-product unit based on online arithmetic for variable precision applications,

Reference 10

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f6b3ccd1-20c0-4ed9-80f0-9f6e3c80c1d7 · outbound

This paper cites Echo: Energy-efficient computation harnessing online arithmetic—an msdf-based accelerator for dnn inference,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Echo: Energy-efficient computation harnessing online arithmetic—an msdf-based accelerator for dnn inference,

Reference 11

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 72a72efb-b722-42fe-b411-7a4b7ff74f54 · outbound

This paper cites Optimizing fpga-based accelerator design for deep convolutional neural networks,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Optimizing fpga-based accelerator design for deep convolutional neural networks,

Reference 12

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 83468348-5ed3-44f0-8353-d34e95817e28 · outbound

This paper cites Unpu: An energy-efficient deep neural network accelerator with fully variable weight bit precision,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Unpu: An energy-efficient deep neural network accelerator with fully variable weight bit precision,

Reference 13

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 81e1a7b1-5bc7-4f39-8a2b-613128b20885 · outbound

This paper cites Constant-time addition with hybrid-redundant numbers: Theory and implementa- tions,.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA Constant-time addition with hybrid-redundant numbers: Theory and implementa- tions,

Reference 14

Resolution: unresolved; no resolver link, observed 2026-06-25T19:39:19.171282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 07555963-89e6-40ca-b723-6a9d7d261074 · outbound

This paper cites FBGEMM: Enabling High-Performance Low-Precision Deep Learning Inference.

Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA FBGEMM: Enabling High-Performance Low-Precision Deep Learning Inference

Reference 15

Resolution: verified exact; arxiv_id, observed 2026-07-04T20:50:10.678976Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

Pith citing papers

No inbound Pith citation observations are available.