Paper Citation Record · LEDGER

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions

As of 10 August 2026, this Paper Citation Record lists 27 of 27 outbound references and 0 inbound Pith citation observations for arXiv:2607.13898.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2607.13898 v1

Coverage vector

measured 27 of 27 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-02T03:25:29.360841Z

measured 27 of 27 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-10T06:31:04.303077+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

27 of 27 outbound references displayed

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verified fuzzy0
unresolved27
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External citation measurements

No source-named external measurement is stored.

Outbound references

Observation a48444ab-5777-46e0-958e-671db44939c5 · outbound

This paper cites GPT-4 Technical Report.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions GPT-4 Technical Report

Reference 1

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.304626Z

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Unavailable: canonical work link unavailable.

Observation c029ddc0-a8d1-4c58-84ee-0df143c5f235 · outbound

This paper cites The Llama 3 Herd of Models.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions The Llama 3 Herd of Models

Reference 2

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.308269Z

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Observation 4cba359a-feba-4455-9d15-e53f2fbc759d · outbound

This paper cites DeepSeek-V3 Technical Report.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions DeepSeek-V3 Technical Report

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.311088Z

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Observation 15487451-e522-402f-8682-57d9ced1c672 · outbound

This paper cites Integer Quantization for Deep Learning Inference: Principles and Empirical Evaluation.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Integer Quantization for Deep Learning Inference: Principles and Empirical Evaluation

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.313595Z

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Observation 345071d8-d100-4f97-9f30-ebfbf078e0d6 · outbound

This paper cites Microscaling Data Formats for Deep Learning.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Microscaling Data Formats for Deep Learning

Reference 5

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.316109Z

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Observation 5d5e934c-748b-43ac-85aa-ec863f86100d · outbound

This paper cites Nvidia Blackwell Platform: Advancing Generative AI and Accelerated Computing,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Nvidia Blackwell Platform: Advancing Generative AI and Accelerated Computing,

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.318856Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 03fac602-b17c-4d5a-a9f9-ba81cde6fda4 · outbound

This paper cites OCP Microscaling Formats (MX) Specification,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions OCP Microscaling Formats (MX) Specification,

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.321084Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 008d4296-91f4-49d2-a4ea-63629f4e561c · outbound

This paper cites Stratix 10 NX Architecture and Applications,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Stratix 10 NX Architecture and Applications,

Reference 8

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.323054Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 321c827d-29ed-4f44-904c-a84457e94652 · outbound

This paper cites Agilex 5 FPGAs and SoCs: Variable Precision DSP Blocks User Guide,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Agilex 5 FPGAs and SoCs: Variable Precision DSP Blocks User Guide,

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.325058Z

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Observation d56de873-0f5a-4823-97b3-b11f3f0a3fb7 · outbound

This paper cites COFFE 2: Automatic Modelling and Optimization of Complex and Heterogeneous FPGA Architectures,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions COFFE 2: Automatic Modelling and Optimization of Complex and Heterogeneous FPGA Architectures,

Reference 10

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.327150Z

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Unavailable: canonical work link unavailable.

Observation e6081289-81a2-4822-8a09-4ca6e377e00a · outbound

This paper cites Introducing NVFP4 for Efficient and Accurate Low-Precision Inference,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Introducing NVFP4 for Efficient and Accurate Low-Precision Inference,

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.329399Z

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Unavailable: canonical work link unavailable.

Observation 392947d3-84f6-4488-81ee-7f3a83abab00 · outbound

This paper cites An OpenCL Deep Learning Accelerator on Arria 10,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions An OpenCL Deep Learning Accelerator on Arria 10,

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.333713Z

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Unavailable: canonical work link unavailable.

Observation 54158c07-0b88-410c-8616-e70eaae6a71b · outbound

This paper cites Inside Project Brainwave’s Cloud-Scale, Real-Time AI Processor,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Inside Project Brainwave’s Cloud-Scale, Real-Time AI Processor,

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.335652Z

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Observation 7e4c1926-cf1f-48a1-9dd3-fcdce80035ad · outbound

This paper cites Pushing the Limits of Narrow Precision Infer- encing at Cloud Scale with Microsoft Floating Point,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Pushing the Limits of Narrow Precision Infer- encing at Cloud Scale with Microsoft Floating Point,

Reference 14

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.337545Z

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Observation c5eca94a-47d1-4724-a5d8-96282891dd83 · outbound

This paper cites Exploring FPGA Designs for MX and Beyond,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Exploring FPGA Designs for MX and Beyond,

Reference 15

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.339470Z

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Unavailable: canonical work link unavailable.

Observation d648aa0b-7de4-45d1-a8de-6fb9fad5e5a8 · outbound

This paper cites Exploring Microscaling MX Minifloat Systolic Arrays on FPGAs,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Exploring Microscaling MX Minifloat Systolic Arrays on FPGAs,

Reference 16

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.341278Z

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Unavailable: canonical work link unavailable.

Observation 8aa65cc9-d33d-4d92-b76b-37d78461c63d · outbound

This paper cites Embracing Diversity: Enhanced DSP Blocks for Low- Precision Deep Learning on FPGAs,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Embracing Diversity: Enhanced DSP Blocks for Low- Precision Deep Learning on FPGAs,

Reference 17

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.343109Z

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Unavailable: canonical work link unavailable.

Observation 34c56f58-1aed-49b2-ba39-a013275a2319 · outbound

This paper cites PIR-DSP: An FPGA DSP Block Architecture for Multi-Precision Deep Neural Networks,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions PIR-DSP: An FPGA DSP Block Architecture for Multi-Precision Deep Neural Networks,

Reference 18

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.344952Z

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Observation d01e9b62-1055-4128-bae3-adfbde81b182 · outbound

This paper cites Tensor Slices: FPGA Building Blocks for the Deep Learning Era,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Tensor Slices: FPGA Building Blocks for the Deep Learning Era,

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.346791Z

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Unavailable: canonical work link unavailable.

Observation f6e19c25-e633-47f8-b7dc-2b868c00f544 · outbound

This paper cites Designing Custom Arithmetic Data Paths with FloPoCo,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Designing Custom Arithmetic Data Paths with FloPoCo,

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.348736Z

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Unavailable: canonical work link unavailable.

Observation e1ce714f-2d66-45aa-8523-04abe0fc5658 · outbound

This paper cites Extracting INT8 Multipliers from INT18 Multipliers,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Extracting INT8 Multipliers from INT18 Multipliers,

Reference 21

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.350607Z

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Unavailable: canonical work link unavailable.

Observation a87da061-fd80-4046-ad1e-e4dcaf2bc6af · outbound

This paper cites Deep Learning with INT8 Optimization on Xilinx Devices,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Deep Learning with INT8 Optimization on Xilinx Devices,

Reference 22

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.352488Z

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Unavailable: canonical work link unavailable.

Observation 5f2990e2-f25f-4902-98bc-8263d5913c07 · outbound

This paper cites Floating-point DSP Block Architec- ture for FPGAs,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Floating-point DSP Block Architec- ture for FPGAs,

Reference 23

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.354735Z

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Unavailable: canonical work link unavailable.

Observation 0ddfd7b5-3853-4fe2-914a-1e762689a90b · outbound

This paper cites ASAP7 Predictive Design Kit Development and Cell Design Technology Co-optimization,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions ASAP7 Predictive Design Kit Development and Cell Design Technology Co-optimization,

Reference 24

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.356649Z

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Unavailable: canonical work link unavailable.

Observation 0f298646-9b84-4cf8-add0-0adb477f0dbd · outbound

This paper cites HAMMER: A Modular and Reusable Physical Design Flow Tool,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions HAMMER: A Modular and Reusable Physical Design Flow Tool,

Reference 25

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.358956Z

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Unavailable: canonical work link unavailable.

Observation e4c82036-18c0-4d8f-82d5-7b5053319e1c · outbound

This paper cites Field-Programmable Gate Array Architecture for Deep Learning: Survey and Future Directions,.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Field-Programmable Gate Array Architecture for Deep Learning: Survey and Future Directions,

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.360841Z

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Observation 92f5c4d2-325c-40f5-aeea-b2b365157089 · outbound

This paper cites Available: https://developer.nvidia.com/blog/ introducing-nvfp4-for-efficient-and-accurate-low-precision-inference/.

Jack of All Scales: A Versatile FPGA Tensor Block for MXFP Precisions Available: https://developer.nvidia.com/blog/ introducing-nvfp4-for-efficient-and-accurate-low-precision-inference/

Reference 2025

Resolution: unresolved; no resolver link, observed 2026-08-02T03:25:29.331458Z

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Pith citing papers

No inbound Pith citation observations are available.