REVIEW 3 major objections 4 minor 46 references
Input–output consistency checks can protect CKKS encrypted computation on CPUs, detecting every single-bit transient fault examined while adding only about 6.8% runtime overhead.
Reviewed by Pith at T0; open to challenge. T0 means a machine referee read the full paper against a public rubric. the ladder, T0–T4 →
T0 review · deepseek-v4-flash
2026-08-01 14:34 UTC pith:WO6WFVL7
load-bearing objection Overhead claims are solid; the 100% detection claim is broader than the mechanism supports — faults in operand loads or result stores are invisible to an input-output consistency check. the 3 major comments →
An Efficient Fault-Tolerance Scheme for CKKS Computation on CPUs
The pith
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
Core claim
On the paper's own terms, the central claim is that the three major CKKS polynomial operators — NTT/INTT, basis conversion, and element-wise multiplication — can be protected on general-purpose CPUs by verifying a checksum invariant between each operator's inputs and outputs, and that the verification can be reshaped to fit CPU arithmetic and memory behaviour. The authors reimplemented the protected operators in an open-source FHE library and report 100% empirical detection of 150,000 non-crashing corrupted-result cases under random single-bit transient faults, with application accuracy staying near the fault-free baseline across fault rates from 10^-12 to 10^-6. They report runtime overhead
What carries the argument
The load-bearing object is the checksum invariant: for a linear operator y = F(x), the checker precomputes vectors e and d with e^T = d^T F so that the input-side checksum Σ e_i x_i equals the output-side checksum Σ d_i y_i under fault-free execution; any single-bit corruption that changes the operator result ideally breaks the equality. Three mechanisms make this cheap on CPUs. Modulus-aware bucket checksum (Eq. 3) accumulates up to s(q) unreduced coefficient products in a 128-bit accumulator and performs one Barrett reduction (the multiply-and-shift modular reduction) per bucket, cutting modular reductions from N to v(q). Dataflow-fused in-operator checking embeds the input-side accumulati
Load-bearing premise
The load-bearing premise is that every single-bit fault that corrupts an operator result also disturbs the side of the checksum invariant the checker actually sees; but faults in operand loads or in stores made after checksum accumulation change both sides together and are invisible by construction, so the claimed 100% detection rate holds only if such instructions are excluded from the fault-injection set.
What would settle it
Inject a single-bit flip into a load that reads a coefficient at an operator's input boundary, or into a store that writes an operator's output after the checksum accumulator has been updated, and check whether the protected pipeline reports a mismatch; if the corrupted ciphertext passes the checksum, the universal single-bit detection claim fails.
If this is right
- Encrypted inference workloads such as LoLA, MLP, ResNet-20, and VGG-16 keep near-fault-free accuracy across fault rates where unprotected CKKS collapses, because corrupted operators are detected and re-executed.
- Protection overhead stays in a 6.0–8.4% band for both ciphertext primitives and full applications, making checksum-based fault detection viable for CPU-based FHE deployment.
- Each detected fault costs less than 1% of end-to-end runtime to recover from, because only the affected operator or short fused segment is re-executed.
- The three optimizations contribute jointly: removing cross-operator fusion raises overhead to roughly 111%, further removing bucket checksum to roughly 125%, and removing in-operator fusion to the roughly 133% basic-checksum baseline.
Where Pith is reading between the lines
- The same bucket-checksum and dataflow-fusion ideas should transfer to other RNS-based FHE schemes and libraries, since they exploit only coefficient bit-widths and operator linearity, not CKKS-specific details.
- The 100% detection figure is contingent on what counts as an 'eligible' fault site: a flip in an operand load at an operator boundary changes both the input checksum and the operator's inputs together, and a flip in a store after the checksum accumulator is updated leaves the in-memory output wrong while the accumulator stays correct; such faults are invisible by construction, so the result should
- Cross-operator fusion weakens fault localization: after fusion, a mismatch at the segment output re-executes two operators, so there is a latency-versus-detection-granularity knob that parameter selection could trade off.
- The detection scheme could be tested beyond random single-bit faults, for example with double-bit flips or faults in address and comparator instructions; the paper's own limitation statement says such models remain future work.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. This paper proposes a checksum-based fault-detection scheme for CKKS polynomial operators (NTT/INTT, EWM, BConv) on CPUs, with three optimizations to reduce protection overhead: modulus-aware bucket checksum that batches modular reductions using wide accumulators (Eq. 3), dataflow-fused in-operator checking that piggybacks checksum accumulation on live loads/stores (Algorithm 1), and cross-operator check fusion that removes redundant boundary checks (Eqs. 5–7). The authors implement the scheme in OpenFHE and evaluate it on four encrypted inference applications and CKKS primitives. They report 100% empirical detection over 150,000 non-crashing single-bit fault injections and 6.0–8.4% runtime overhead (average 6.8%), a 4.9x reduction relative to a basic checksum baseline. The overhead results are supported by a progressive ablation and hardware-counter profiling.
Significance. If the detection claim can be scoped to a well-defined fault model, this is a solid engineering contribution. The algebraic invariants are parameter-free, the bucket-size formula in Eq. (2) is closed-form, and the ablation/hardware-counter data consistently attribute the overhead reduction to the three proposed optimizations; 1,000-run averaging and 150,000 fault cases are reasonable. The main concern is that the described checks are consistency checks over register-level values, so single-bit faults in operand loads or output stores at operator boundaries are invisible by construction. The 'eligible dynamic instructions' filter is undefined, making the headline 100% detection rate unreproducible and, if loads/stores are eligible, impossible. The paper's value would survive a narrowed scope ('protection of the arithmetic datapath'), but the current claims overstate the coverage.
major comments (3)
- [§4.3.1, §4.3.2, Algorithm 1] The checks are input-output consistency checks over register-level values, so single-bit faults in an operand load at an operator boundary are invisible by construction: C_in is accumulated from the same loaded a_i that feeds the computation (Algorithm 1 lines 6–7), and in EWM C_in and C_out are the same product Σ a_i k_i on both sides. A fault in a store after C_out has been accumulated (line 13) likewise corrupts memory without changing the checked values. The 'eligible dynamic instructions' of §3.1 is never defined; if it includes loads/stores, the 100% detection in Table II cannot hold; if it excludes them, the fault model and claims must be narrowed. This is load-bearing for the abstract and §5.2.
- [§5.2, Table II] The detection-rate methodology is unreproducible as reported. The 150,000 'non-crashing corrupted-result cases' are sampled from an unspecified eligible-instruction set; no PinFI configuration, instruction-class filter, or artifact is provided. Without knowing whether memory, address, control-flow, or checksum instructions are eligible, the reader cannot interpret or repeat the experiment. Please specify the exact eligible instruction classes per operator, report detection rates stratified by fault class (e.g., arithmetic vs. load/store), and provide the injection script/artifact or a precise pseudocode description. The current '100%' is broader than what the described mechanism can guarantee.
- [§4.2.1, Eq. (2)] The overflow bound s(q)·(q−1)^2 ≤ 2^D − 1 is derived for fault-free operands in [0, q−1]. Under the single-bit fault model of §3.1, a flipped bit in a load or ALU result can produce an operand up to 2^64−1, so a bucket of s(q) products can exceed the 128-bit accumulator. The claim that no dynamic overflow check is required therefore does not hold in exactly the faulty cases the scheme must detect. Please clarify whether overflow-induced behavior (including false accept by wrap-around) is accounted for in the empirical 100% detection claim, or state an additional bound/assumption on faulted operands.
minor comments (4)
- [§2.2 vs. §4.3.1] The notation for checksum vectors is inconsistent: in §2.2 the encoding vector is e and the decoding vector is d, while in §4.3.1 e is called the decode vector. Please unify the notation.
- [Algorithm 1, line 12] Computing b = floor(i/s) for every output coefficient introduces a per-element division (or a constant-division optimization). The paper does not mention how this is handled in the implementation; consider describing an incrementing bucket counter or noting the compiler strength reduction.
- [Figure 1] The figure caption contains stray text ('Version Evaluation on (a)? Barrier') that appears to be an editing artifact. Please clean it up.
- [Table I] The table formatting is garbled: entries such as '2 16 215 30≈1560 128' are hard to parse. Please use proper math notation (e.g., N = 2^16, slots = 2^15, log2 Q ≈ 1560) and clarify the meaning of each column.
Circularity Check
No circularity found: the checksum invariants are parameter-free algebraic identities and the three optimizations are structural transformations; the 100% detection claim has a non-circular coverage gap.
full rationale
The derivation chain is self-contained. Eq. (2) derives bucket sizes from a bit-width bound s(q)=floor((2^D-1)/(q-1)^2) with no fitted constants; Eq. (3) is a rearrangement of the coefficient-sum with Barrett reductions postponed per bucket; Eq. (4) is modular linearity. The NTT encode/decode vectors are determined by the transform matrix (e^T = d^T F), EWM and BConv checks are direct algebraic definitions, and cross-operator fusion (Eqs. 5-7) propagates an identical checksum state only when the decode and encode vectors coincide, which is an algebraic identity rather than a fitted prediction. No load-bearing step relies on a self-citation; the only overlapping-author citation ([33]) supports the background linearity of NTT and is not used to force the scheme. The 100% detection rate in Table II is empirical, not derived, and the paper's own mechanism description indicates that a single-bit fault in an operator input load (Algorithm 1 lines 6-7 accumulate C_in from the same a_i that feeds the butterflies) or in a store after the final accumulator would change both sides consistently and evade the invariant. This is a validity/coverage concern, not circularity: the invariant is not equivalent to the claimed prediction by construction, and the empirical claim is under-specified because Section 3.1's 'eligible dynamic instructions' is undefined. The paper's limitation statement ('The reported 100% detection rate is empirical and applies to the collected non-crashing cases under the evaluated fault model') narrows but does not repair this missing injection-policy definition. Such concerns belong to correctness risk, not to circularity of the derivation.
Axiom & Free-Parameter Ledger
axioms (6)
- domain assumption At most one single-bit fault occurs per low-level polynomial-operator invocation, and faults are independent.
- standard math The NTT/INTT checksum invariant Σ a_i ≡ Σ e_i·NTT(a)_i (mod q) holds with precomputed decode vector e, and every e_i ≠ 0 mod q.
- domain assumption The RNS moduli in the evaluated configurations are ~50–60 bits, leaving spare headroom in the 128-bit accumulator.
- domain assumption Adjacent operators pass the same polynomial representation, so Dec_f(y) = Enc_g(y) at fused boundaries.
- domain assumption PinFI instruction-level fault injection with the stated eligibility policy faithfully samples transient hardware faults.
- ad hoc to paper A consistency check that sees every single-bit fault corrupting an operator result must detect faults in operand loads and in stores made after decode accumulation.
read the original abstract
Fully homomorphic encryption (FHE) enables computation on encrypted data, but its long ciphertext dataflow and high-dimensional modular arithmetic make it vulnerable to silent data corruption caused by transient hardware faults. Existing protection methods either target dedicated accelerators or impose substantial execution, modular-arithmetic, and memory-access overheads on CPUs. This work presents an efficient fault-tolerance scheme for CPU-based CKKS computation. It checks the input-output consistency of polynomial operators while reducing protection overhead at three levels. First, modulus-aware bucket checksum exploits wide CPU accumulators to reduce expensive modular reductions. Second, dataflow-fused in-operator checking embeds checksum accumulation into operator dataflows, avoiding separate scans of long ciphertext polynomials. Third, cross-operator check fusion eliminates redundant checksum computations between adjacent operators while preserving end-to-end checking invariants. We implement the scheme in OpenFHE and evaluate it on representative encrypted applications and ciphertext primitives under random single-bit transient faults. It achieves a 100 percent empirical detection rate across 150,000 non-crashing corrupted-result cases and maintains application accuracy close to the fault-free baseline over a wide range of fault rates. The scheme incurs only 6.0 percent to 8.4 percent runtime overhead, averaging 6.8 percent, and reduces average protection overhead by 4.9 times compared with direct checksum-based protection.
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