Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-01T08:24:26.702107Z
Paper Citation Record · LEDGER
As of 8 August 2026, this Paper Citation Record lists 13 of 13 outbound references and 0 inbound Pith citation observations for arXiv:2607.21130.
A citation records a reference. It does not transfer a finding from one paper to another.
Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-01T08:24:26.702107Z
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-08T06:32:00.761636+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links
A source-named dated measurement, never combined with another source.
Source: cited_works
13 of 13 outbound references displayed
External citation measurements
No source-named external measurement is stored.
Observation 77acf553-0c07-4043-a6c0-4d9a378f85c0 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core Advances in Neural Information Processing Systems33, 11285–11297 (2020)
Reference 1
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation e7ca3dcc-950d-4b3b-9fe5-c0f0961e4745 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2024)
Reference 2
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation dcd80e8d-d8d6-4b08-bde6-e25824c5e446 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration
Reference 3
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 02db8147-1a9f-46cd-9948-322b6abbd122 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core 0: Risc-v embedded vector unit with half- precision floating-point support for tinyml
Reference 4
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 95beccbf-ee0a-4d80-8740-6c1314a0d5c9 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core IEEE Transactions on Computers (2026)
Reference 5
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 9235a2dc-cb68-43d7-9b5c-67126fc03d33 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core In: Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions
Reference 6
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation df53e150-2994-418e-bfd1-e4ea1bc85247 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core In: 2025 33rd Telecommunications Forum (TELFOR)
Reference 7
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 63837ba8-de2e-473b-b6df-5d5c7f757386 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core In: International Conference on Embedded Computer Systems
Reference 8
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 6053f72c-5bdb-4efb-a5c3-53b99c680fec · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS)
Reference 9
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 8a0c0847-791f-408f-be6a-d6a104fb0f31 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core IEEE Transactions on Computers73(7), 1822–1836 (2024)
Reference 10
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation baf9d085-bd8c-4197-ad4d-621c23ae9dc5 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core In: International Conference on Data Science and Artificial Intelligence
Reference 11
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation d2069f0b-888a-47ae-a437-8c263640a95d · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core In: 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Reference 12
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 8de5e572-1ab9-457d-9b1b-bba3ff9a9cb9 · outbound
Hardware-Software Co-Design for Float16 On-Device Training on RISC-V Single-Core IEEE Transactions on Pattern Analysis and Machine Intelligence46(6), 4519–4533 (2024) 7
Reference 13
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
No inbound Pith citation observations are available.