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MPAI: A Co-Processing Architecture with MPSoC & AI Accelerators for Vision Applications in Space

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arxiv 2409.12258 v1 pith:45K3G7LE submitted 2024-09-18 cs.AR cs.ET

MPAI: A Co-Processing Architecture with MPSoC & AI Accelerators for Vision Applications in Space

classification cs.AR cs.ET
keywords acceleratorsarchitectureapplicationsco-processingmpaimpsocspaceaccommodates
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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The emerging need for fast and power-efficient AI/ML deployment on-board spacecraft has forced the space industry to examine specialized accelerators, which have been successfully used in terrestrial applications. Towards this direction, the current work introduces a very heterogeneous co-processing architecture that is built around UltraScale+ MPSoC and its programmable DPU, as well as commercial AI/ML accelerators such as MyriadX VPU and Edge TPU. The proposed architecture, called MPAI, handles networks of different size/complexity and accommodates speed-accuracy-energy trade-offs by exploiting the diversity of accelerators in precision and computational power. This brief provides technical background and reports preliminary experimental results and outcomes.

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