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arxiv: 2606.21842 · v1 · pith:564UV532new · submitted 2026-06-20 · 💻 cs.CR

Agent-Assisted Side-Channel Attacks on Non-Prefix KV Cache in RAG

He Sun , Shinan Liu , Siyuan Ma , Junhao Li , Mingjun Xiao , Wenhao Jiang This is my paper

Pith reviewed 2026-06-26 12:17 UTC · model grok-4.3

classification 💻 cs.CR
keywords side-channel attackKV cacheRAGLLM servingtiming signaturememory fusionprivacy breach
0
0 comments X

The pith

Non-prefix KV cache fusion leaks a Step-Wave timing signature that enables token-by-token extraction of private RAG prompts.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper shows that chunk-aware memory scheduling in LLM engines creates structural vulnerabilities when fusing non-prefix KV caches for RAG inference. Deterministic alignment of disjoint chunks produces an observable continuous timing pattern. SpliceLeak uses this pattern first to measure hidden private prompt lengths and then to force boundary collisions that reveal exact token content. The attack succeeds at high rates on real serving stacks even with batching noise and low request counts. A defense pair is presented that removes the timing signal while keeping most of the deduplication benefit.

Core claim

The deterministic micro-architectural mechanisms used to align and fuse disjoint memory chunks inadvertently leak a continuous Step-Wave timing signature. SpliceLeak exploits the signature in a two-phase breach: first structurally fingerprinting the exact length of hidden private prompts, then manipulating boundary collisions to extract exact semantic content token-by-token, reaching up to 100 percent success with as few as 63 requests per token on vLLM plus LMCache under continuous batching.

What carries the argument

The Step-Wave timing signature produced by deterministic chunk alignment and fusion during non-prefix KV cache scheduling.

If this is right

  • The attack reaches 100 percent extraction success in bounded-entropy cases.
  • It requires only 63 requests per token while surviving realistic continuous batching.
  • It applies directly to production frameworks such as vLLM integrated with LMCache.
  • SpliceDefense using quantized chunk padding and constant-time boundary fusion removes the timing signal with negligible throughput cost.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Similar timing leaks could appear in any inference optimization that relies on deterministic memory chunk placement across tenants.
  • Future engines may need to treat memory deduplication as a tunable security parameter rather than a pure performance win.
  • The two-phase fingerprint-then-extract pattern may generalize to other cache-sharing surfaces beyond KV stores.

Load-bearing premise

The deterministic micro-architectural mechanisms used to align and fuse disjoint memory chunks inadvertently leak a continuous Step-Wave timing signature that remains observable and exploitable in production environments with continuous batching.

What would settle it

Run the same workload on a modified scheduler that disables or randomizes chunk fusion; if the Step-Wave pattern vanishes while cache sharing still occurs, the causal link between fusion logic and the leak is confirmed.

Figures

Figures reproduced from arXiv: 2606.21842 by He Sun, Junhao Li, Mingjun Xiao, Shinan Liu, Siyuan Ma, Wenhao Jiang.

Figure 1
Figure 1. Figure 1: Comparison of KV cache sharing mechanisms in LLM serving and RAG-optimized serving. (a) Traditional strict [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Micro-architectural execution timeline comparing an [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 4
Figure 4. Figure 4: High-level overview of our system model for multi [PITH_FULL_IMAGE:figures/full_fig_p005_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: TTFT side-channel in a 16K-token RAG scenario [PITH_FULL_IMAGE:figures/full_fig_p007_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: Micro-architectural profiling of the Step-Wave TTFT side-channel in LMCache. (a) The overall [PITH_FULL_IMAGE:figures/full_fig_p008_6.png] view at source ↗
Figure 8
Figure 8. Figure 8: Micro-benchmark of Token-by-Token Continuous Ex [PITH_FULL_IMAGE:figures/full_fig_p011_8.png] view at source ↗
read the original abstract

Modern Large Language Model (LLM) serving engines increasingly rely on Retrieval-Augmented Generation (RAG) and non-prefix Key-Value (KV) cache fusion to accelerate long-context, multi-tenant inference. While existing KV cache side-channel attacks require strict linear prefix alignment--rendering them ineffective against real-world RAG queries that contain unique, user-specific private prefixes--we uncover a critical class of structural vulnerabilities inherent to chunk-aware memory scheduling. We demonstrate that the deterministic micro-architectural mechanisms used to align and fuse disjoint memory chunks inadvertently leak a continuous "Step-Wave" timing signature. Exploiting this physical observation, we introduce SpliceLeak, the first end-to-end side-channel attack targeting non-prefix KV cache fusion. SpliceLeak executes a systematic two-phase privacy breach: it first structurally fingerprints the exact length of hidden private prompts, and subsequently manipulates boundary collisions to extract exact semantic content token-by-token. Extensive evaluations on production-grade frameworks (vLLM integrated with LMCache) demonstrate that SpliceLeak achieves up to a 100% extraction success rate in bounded-entropy scenarios. Driven by a deterministic +104 ms hardware latency void, the attack requires as few as 63 requests per token, piercing through realistic continuous batching noise. To resolve the inherent conflict between memory deduplication and security, we propose SpliceDefense, a bipartite mitigation framework consisting of Quantized Chunk Padding (QCP) and Constant-Time Boundary Fusion (CTBF). Our evaluations confirm that SpliceDefense effectively flattens the side-channel signal (Delta TTFT ~ 0) with negligible throughput overhead, preserving the critical benefits of global cache sharing.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

3 major / 2 minor

Summary. The manuscript introduces SpliceLeak, the first end-to-end side-channel attack on non-prefix KV cache fusion in RAG systems. It exploits a deterministic 'Step-Wave' timing signature arising from micro-architectural chunk alignment and fusion mechanisms in engines such as vLLM+LMCache. The attack proceeds in two phases—structural fingerprinting of private prompt lengths followed by boundary-collision token extraction—claiming up to 100% success in bounded-entropy settings with as few as 63 requests per token while piercing continuous batching noise. A bipartite mitigation, SpliceDefense (Quantized Chunk Padding and Constant-Time Boundary Fusion), is proposed to flatten the signal (Delta TTFT ~0) with negligible throughput cost.

Significance. If the timing observations and extraction results hold under realistic multi-tenant conditions, the work identifies a previously unaddressed class of structural side channels that bypass the prefix-alignment prerequisite of prior KV-cache attacks. The empirical attack plus concrete mitigation would be relevant to the security of production LLM serving stacks that rely on global cache deduplication for long-context RAG.

major comments (3)
  1. [Evaluation / Abstract] The central claim that the deterministic +104 ms hardware latency void produces an observable and exploitable continuous Step-Wave signature that survives production-grade continuous batching noise is load-bearing for both the attack feasibility and the 100% extraction / 63-request figures. The manuscript provides no quantitative characterization of observed timing variance, number of concurrent tenants, scheduler jitter, or direct comparison of the 104 ms delta against batch-induced variance distributions in the reported experiments.
  2. [Evaluation] Success rates (100% extraction, 63 requests/token) are stated without accompanying experimental details such as dataset descriptions, number of trials, error bars, verification methodology for extracted tokens, or the precise bounded-entropy scenario definition. These omissions prevent assessment of whether the results support the cross-scenario claims.
  3. [Mitigation / Evaluation] The mitigation evaluation asserts Delta TTFT ~0 and negligible throughput overhead, yet no concrete throughput numbers, latency distributions, or comparison against the undefended baseline under the same workload are supplied to substantiate that the defense preserves the benefits of global cache sharing.
minor comments (2)
  1. [Attack Description] Notation for the Step-Wave signature and boundary-collision phases should be defined more formally (e.g., with timing diagrams or pseudocode) to aid reproducibility.
  2. [Introduction] Prior KV-cache side-channel literature (prefix-based attacks) is referenced only in passing; a dedicated related-work subsection would clarify the novelty of the non-prefix setting.

Simulated Author's Rebuttal

3 responses · 0 unresolved

We thank the referee for the constructive and detailed review. The comments highlight areas where additional quantitative evidence and experimental transparency would strengthen the manuscript. We address each major comment below and commit to incorporating the requested details in the revised version.

read point-by-point responses

  1. Referee: [Evaluation / Abstract] The central claim that the deterministic +104 ms hardware latency void produces an observable and exploitable continuous Step-Wave signature that survives production-grade continuous batching noise is load-bearing for both the attack feasibility and the 100% extraction / 63-request figures. The manuscript provides no quantitative characterization of observed timing variance, number of concurrent tenants, scheduler jitter, or direct comparison of the 104 ms delta against batch-induced variance distributions in the reported experiments.

    Authors: We agree that the current presentation lacks sufficient quantitative support for the claim that the Step-Wave remains distinguishable under continuous batching. In the revised manuscript we will add a new subsection (likely in Section 5) that reports: (i) measured timing variance (mean, std, and distributions) across repeated trials, (ii) the exact number of concurrent tenants and request rates used in the multi-tenant experiments, (iii) observed scheduler jitter statistics, and (iv) direct statistical comparisons (e.g., CDF plots or hypothesis tests) between the +104 ms hardware delta and the variance attributable to batching. These additions will be drawn from the same vLLM+LMCache testbed already used for the attack results. revision: yes

  2. Referee: [Evaluation] Success rates (100% extraction, 63 requests/token) are stated without accompanying experimental details such as dataset descriptions, number of trials, error bars, verification methodology for extracted tokens, or the precise bounded-entropy scenario definition. These omissions prevent assessment of whether the results support the cross-scenario claims.

    Authors: The manuscript currently states the headline figures but does not supply the supporting experimental metadata the referee correctly identifies as missing. We will expand Section 5 to include: full descriptions of the datasets and the precise entropy bounds used to define the “bounded-entropy” regime, the total number of independent trials per configuration together with error bars or confidence intervals, the token-verification procedure (exact matching against ground-truth private prompts), and any filtering or success criteria applied. This expanded reporting will allow readers to evaluate the 100 % / 63-request claims under the stated conditions. revision: yes

  3. Referee: [Mitigation / Evaluation] The mitigation evaluation asserts Delta TTFT ~0 and negligible throughput overhead, yet no concrete throughput numbers, latency distributions, or comparison against the undefended baseline under the same workload are supplied to substantiate that the defense preserves the benefits of global cache sharing.

    Authors: We acknowledge that the mitigation claims rest on qualitative statements rather than the concrete side-by-side metrics requested. In the revision we will add tables and figures that report: measured end-to-end throughput (tokens/s) and TTFT distributions for both the defended and undefended systems under identical workloads, the exact overhead percentages, and latency histograms that demonstrate Delta TTFT remains near zero while cache-sharing benefits are retained. All measurements will reuse the same experimental harness and workload parameters as the attack evaluation. revision: yes

Circularity Check

0 steps flagged

No circularity: empirical attack demonstration

full rationale

This is an empirical security paper describing an observed side-channel attack (SpliceLeak) and mitigation (SpliceDefense) on KV cache fusion in production LLM serving frameworks. The abstract and described content contain no equations, first-principles derivations, fitted parameters renamed as predictions, or load-bearing self-citations. All claims rest on experimental measurements of timing signatures and extraction rates rather than any self-referential construction. Per the guidelines, such papers receive score 0 with no steps when the result is not forced by definition or citation chains.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Abstract-only review yields no explicit free parameters, axioms, or invented entities; no mathematical derivations or modeling assumptions are detailed beyond the existence of the timing signature.

pith-pipeline@v0.9.1-grok · 5845 in / 1139 out tokens · 24305 ms · 2026-06-26T12:17:41.638484+00:00 · methodology

discussion (0)

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Reference graph

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    B. Peng, C. Li, P. He, M. Galley, and J. Gao, “Instruction tuning with gpt-4,”arXiv preprint arXiv:2304.03277, 2023. APPENDIX A. Discussion and Future Work Impact of Network Jitter.Like other timing channels [25], SpliceLeak’s efficacy relies on theT T T F T Signal-to-Noise Ratio (SNR). While large latency drops (∆≥800ms) easily pierce standard batching n...

    Pith/arXiv arXiv 2023