Designing multi-level resistance states for multi-bit storage using half doped manganites

Designing nonvolatile multi-level resistive devices is the necessity of time to go beyond traditional one-bit storage systems, thus enhancing the storage density. Here, we explore the electronic phase competition scenario to design multi-level resistance states using a half doped CE-type charge ordered insulating bulk manganite, $Sm_{0.5}Ca_{0.25}Sr_{0.25}MnO_3$ (SCSMO). By introducing electronic phase coexistence in a controllable manner in SCSMO, we show that the system can be stabilized into several metastable states, against thermal cycling, up to 62 K. As a result the magnetization (and the resistivity) remains unaltered during the thermal cycling. Monte Carlo calculations using two-band double exchange model, including super-exchange, electron-phonon coupling, and quenched disorder, show that the system freezes into a phase coexistence metastable state during the thermal cycling due to the chemical disorder in SCSMO. Using the obtained insights we outline a pathway by utilizing four reversible metastable resistance states to design a prototype multi-bit memory device.