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Neural Network Quantization for Efficient Inference: A Survey

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arxiv 2112.06126 v2 pith:5ZRJRFPH submitted 2021-12-08 cs.LG

classification cs.LG
keywords neuralnetworknetworksquantizationbeencomplexitydeployreducing
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As neural networks have become more powerful, there has been a rising desire to deploy them in the real world; however, the power and accuracy of neural networks is largely due to their depth and complexity, making them difficult to deploy, especially in resource-constrained devices. Neural network quantization has recently arisen to meet this demand of reducing the size and complexity of neural networks by reducing the precision of a network. With smaller and simpler networks, it becomes possible to run neural networks within the constraints of their target hardware. This paper surveys the many neural network quantization techniques that have been developed in the last decade. Based on this survey and comparison of neural network quantization techniques, we propose future directions of research in the area.

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Cited by 3 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Lyapunov-Guided Training for Hardware-Safe Neural Networks Under Fixed-Point Arithmetic

    cs.LG 2026-07 conditional novelty 6.0 of 10

    Monotone Lyapunov projection of layerwise hidden-state energy suppresses two's-complement overflow under wrapping fixed-point QAT/PTQ, recovering 86.55% MNIST accuracy where unconstrained models collapse to chance.

  2. Automatic mixed precision for optimizing gained time with constrained loss mean-squared-error based on model partition to sequential sub-graphs

    cs.LG 2025-05 conditional novelty 6.0 of 10

    The paper derives an additive loss-MSE sensitivity metric and a hardware-aware time-gain model, then uses integer programming to assign per-layer FP8 or BF16 formats for LLM inference.

  3. Efficient Split Learning LSTM Models for FPGA-based Edge IoT Devices

    cs.LG 2025-02 conditional novelty 4.0 of 10

    A case study showing how knowledge distillation, pruning, and quantization let a small LSTM run on a low-end FPGA, with three split configurations trading off latency, power, and resource usage.

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