REVIEW 3 major objections 3 minor 28 references
Demonstration of a quantum comparator on an ion-trap quantum device
T0 review · 3 major / 3 minor · reviewed 2026-08-03 · deepseek-v4-flash
Pith's one-line read A trapped-ion quantum computer ran a 9-bit comparator—a circuit deciding whether one integer is smaller than another—with 95% success and no error mitigation.
desk verdict Useful experimental benchmark for NISQ arithmetic, but the “quantum” claim is thinner than the abstract suggests — the data certify a high-fidelity reversible circuit, not coherent comparison. read the letter →
The pith
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
The reading
What carries the argument
The load-bearing object is the ripple-borrow comparator, a reversible subtraction circuit that extracts the sign of a−b without storing the full difference. A single ancilla qubit carries the borrow bit, updated cell by cell from the least to most significant pair of input bits using majority/unmajority gates composed of CNOT and doubly-controlled-NOT operations. The comparator's depth grows linearly with n, which is precisely what makes it a demanding benchmark: errors in the ancilla accumulate across the whole cascade. The hardware feature that makes the depth tolerable is all-to-all qubit connectivity plus high two-qubit gate fidelities.
What would settle it
Prepare the input registers in the superposition (|0,1> + e^{iφ}|1,1>)/√2, run the comparator, and measure the output qubit in the X basis. The ideal unitary gives an X-measurement probability that oscillates with φ; observing a φ-independent 50/50 mixture would falsify the claim that the process is coherently quantum rather than a classical truth-table computation.
Extended reading notes
Core claim
The paper's central claim is that a quantum comparator—a unitarily implemented Boolean function f(a,b) that returns 1 exactly when the n-bit integer a is less than b—has been executed on real trapped-ion hardware for bit widths n=3, 5, 7, and 9. The experiment prepares a uniform superposition of all ordered integer pairs using single-qubit superposition gates, runs a ripple-borrow comparator constructed from CNOT and doubly-controlled-NOT gates with one ancilla, then measures every qubit in the computational basis. Under the conventional output-only criterion the success probabilities are about 98%, 97%, 97%, and 95%; under the stricter criterion requiring the ancilla to be correct as well,
Load-bearing premise
The load-bearing assumption is that measuring all qubits in the computational basis and seeing the correct truth table after the unitary is enough to establish a 'quantum' comparison; no tomography, entanglement witness, or interference experiment is performed, so if coherent superposition is required for the claim, the data do not establish it.
Editorial extensions
If this is right
- Quantum comparison is no longer confined to n=2 with classical inputs; the same circuit family now runs with n=9 on real hardware.
- The output-only success rate at n=9 (95%) is more than an order of magnitude above random (5% failure vs 50% failure), so the comparator is usable as a standalone arithmetic block.
- The ancilla-inclusive success rate (69% at n=9) quantifies the cost of using the comparator inside a larger circuit where the borrow ancilla must be restored.
- Ancilla-only errors are the dominant failure mode at n=7 and n=9, so future effort should target the ancilla's fidelity rather than the logical comparison path.
- No error mitigation is needed, meaning the measured rates are raw hardware characteristics and can be improved by hardware advances alone.
Reading between the lines
- The reported statistics are exactly those of a classical reversible truth table sampled uniformly, so a reader should not infer evidence of superposition or entanglement from them; an interference measurement would be needed to certify coherence.
- If the goal is to benchmark hardware for arithmetic, the comparator could serve as a scalable stress test for decoherence along a long ancilla chain—analogous to randomized benchmarking but at algorithmic depth.
- A concrete next experiment is to vary the phase of a superposition of two input pairs and look for interference in the output register; the paper's own Z-error commutativity analysis suggests such a signal may be weak or absent.
- The success rates suggest that with an error-corrected or logical ancilla, the stricter criterion could approach the conventional one, making the comparator attractive as a building block for modular-exponentiation circuits.
Signed reviews
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The paper reports execution of a reversible comparator circuit for n-bit integers (n = 3, 5, 7, 9) on the RIKEN Reimei trapped-ion quantum computer. The circuit prepares a uniform superposition over all 2n-bit input pairs with Hadamard gates, applies a ripple-carry-style comparator, and measures all qubits in the computational basis. Reported success probabilities are about 98%, 97%, 97%, and 95% under a conventional output-only criterion, and about 95%, 92%, 89%, and 69% under a stricter ancilla-inclusive criterion, with no postselection or error mitigation. The paper interprets these results as demonstrating reliable quantum comparison at scales beyond previous experiments.
Significance. The experiment addresses a meaningful benchmark: comparators are a basic arithmetic primitive, and linear-depth ripple circuits stress multi-qubit operations. The stricter ancilla-inclusive criterion is a useful addition, and the absence of postselection/error mitigation strengthens the practical relevance of the raw success rates. However, the central scientific claim—that the data demonstrate a quantum comparator—is not supported by the measurements as presented. The data are consistent with a classical noisy reversible circuit executed on a quantum processor; the paper itself concedes that phase coherence was not verified. If the coherence gap is addressed, or the claims are appropriately reframed, the result would be a valuable system-level benchmark for arithmetic circuits on trapped-ion hardware.
major comments (3)
- [Sec. III (Eq. (4), Fig. 2); Sec. VI] The reported observable is a histogram of computational-basis outcomes after a unitary that permutes computational basis states. For such a protocol, the output distribution is exactly that of a classical reversible circuit acting on uniformly sampled inputs with bit-flip noise; off-diagonal coherences never appear in the measured statistics. The paper itself states in Sec. III that 'the phase coherence, even if created in the first stage, might not survive in later stages' and in Sec. VI that 'an estimation of the phase is anticipated.' No state tomography, entanglement witness, phase-sensitive interference experiment, or equivalent coherence certification is reported. Therefore the title/abstract claim of 'reliable quantum comparison' is not established by the data: what is demonstrated is correct comparator truth-table statistics on a quantum processor, not a coherent quantum comparis
- [Sec. IV (Figs. 3 and 4)] All quantitative claims rest on 100 shots per n, yet no confidence intervals or statistical uncertainties are reported. At n=9, for example, the 95% and 69% point estimates have approximate Wilson 95% intervals of (88.7%, 98.4%) and (59.6%, 77.7%) respectively. The separation from the 50% and 25% random baselines is large enough that the main qualitative conclusion is robust, but quantitative comparisons such as 'more than an order-of-magnitude reduction in failure probability' and 'higher than the random baseline by a factor of 69%/29%≈3' need error bars and corrected arithmetic: the ancilla-inclusive random baseline is 25%, so 69%/25% ≈ 2.8, not 69%/29%. Please report counts, confidence intervals, and the exact baseline calculation.
- [Secs. II–IV; Data Availability] The manuscript does not provide the concrete compiled circuits used for n=5, 7, and 9 (gate counts, native-gate decompositions, qubit layout), nor device calibration data such as two-qubit gate fidelities and readout error rates. Since the entire quantitative claim is about hardware execution, these are not optional details; for example, a readout error of a few percent on the result qubit would directly contribute to the reported 5% failure at n=9. Please include the compiled circuits in a permanent repository and report the relevant calibration/readout characterization.
minor comments (3)
- [Sec. II] The text says the comparator circuit is 'adapted from Ref. [21]', but Ref. [21] is Gouzien et al., a cat-code architecture paper, not a comparator construction. This appears to be a citation error; Ref. [11] (Cuccaro et al.) or another comparator reference is likely intended.
- [Fig. 4 caption] The caption reads 'introduce as a stricter criterion'; it should be 'introduced as a stricter criterion'.
- [Acknowledgments] The text says 'JPSJ KAKENHI'; this should likely be 'JSPS KAKENHI'.
Circularity Check
No circular derivation: success is measured against an external truth table with no fitted parameters or self-referential benchmark.
full rationale
The paper's derivation chain is an experimental benchmark, not a mathematical derivation. The claimed success probabilities are counts of measured computational-basis outputs compared against the externally specified Boolean predicate f(a,b) defined in Eq. (3). The circuit itself is adapted from independent prior work (Cuccaro et al., Ref. [11]), the input states are prepared by Hadamard gates, and the random-output baselines (50% and 25%) are fixed probabilities, not quantities fitted to the data. No parameter is extracted from the measured outcomes and then renamed as a prediction; the four outcome categories in Sec. IV B are a classification of data, not a model fit. The only substantive concern is the gap between the phrase 'quantum comparison' and the evidence: the experiment measures all qubits in the computational basis, and the paper itself concedes in Sec. III that 'the phase coherence, even if created in the first stage, might not survive in later stages' and that 'the relevant noises are rather the bit-flip (X) errors.' As the circuit is a basis-permuting unitary, the measured statistics are equally explainable by a classical reversible circuit with bit-flip noise, so the computational-basis data do not by themselves certify coherent quantum operation. But this is an evidentiary/validity limitation, not circularity: the conclusion is not made true by definition, nor is any load-bearing step reduced to its own input. There is no self-citation chain of the kind that would make the central claim forced. Therefore the appropriate circularity score is 0.
Assumptions & free parameters
assumptions (5)
- domain assumption The circuit in Fig. 2 correctly implements the comparator unitary |a,b,c> -> |a,b,c⊕f(a,b)> for n=3,5,7,9.
- standard math Hadamard gates on n input qubits produce the uniform superposition over all 2^{2n} input pairs.
- domain assumption Z errors do not affect computational-basis measurement statistics of this circuit.
- domain assumption The device's measurement outcomes faithfully reflect the final state; no measurement-error calibration is provided.
- standard math Random baseline success probability is 50% (conventional) and 25% (ancilla-inclusive).
Cite this review
Pith. "Pith review of Demonstration of a quantum comparator on an ion-trap quantum device." pith.science (2026). https://pith.science/paper/74RWDPD4
@misc{pith2026251217779,
author = {Pith},
title = {Pith review of: Demonstration of a quantum comparator on an ion-trap quantum device},
year = {2026},
howpublished = {\url{https://pith.science/paper/74RWDPD4}},
note = {Machine review of arXiv:2512.17779}
}
read the original abstract
Quantum computers are believed to solve a class of computational problems that are based on modular arithmetic faster than classical computers. Among the arithmetic building blocks, comparison of integer pairs is a primitive. Here we report its demonstration in the Reimei quantum computer at RIKEN, whose trapped-ion architecture provides all-to-all qubit connectivity together with high gate fidelities. We observe high success probabilities for bit widths n = 3, 5, 7, and 9: Under a conventional output-only success criterion we obtain 95% at n=9; under a stricter criterion additionally requiring the ancilla to be correct, the success is 69% at n=9. These results demonstrate reliable quantum comparison at scales far beyond those previously achieved experimentally, not only for comparators but also in the broader context of quantum arithmetic circuits.
Figures
Reference graph
Works this paper leans on
-
[21]
Gouzien, D
E. Gouzien, D. Ruiz, F.-M. Le R´ egent, J. Guillaud, and N. Sangouard, Performance Analysis of a Repetition Cat Code Architecture: Computing 256-bit Elliptic Curve Logarithm in 9 Hours with 126 133 Cat Qubits, Phys. Rev. Lett.131, 040602 (2023)
2023
-
[11]
S. A. Cuccaro, T. G. Draper, S. A. Kutin, and D. P. Moulton, A new quantum ripple-carry addition circuit (2004), arXiv:quant-ph/0410184 [quant-ph]
arXiv 2004
-
[1]
M. A. Nielsen and I. L. Chuang,Quantum Computation and Quantum Information, 10th ed. (Cambridge Univer- sity Press, Cambridge, 2010). 5
2010
-
[2]
Shor, Algorithms for quantum computation: discrete logarithms and factoring, inProceedings 35th Annual Symposium on Foundations of Computer Science(1994) pp
P. Shor, Algorithms for quantum computation: discrete logarithms and factoring, inProceedings 35th Annual Symposium on Foundations of Computer Science(1994) pp. 124–134
1994
-
[3]
C. Durr and P. Hoyer, A quantum algorithm for finding the minimum (1999), arXiv:quant-ph/9607014 [quant- ph]
arXiv 1999
-
[4]
Rebentrost, B
P. Rebentrost, B. Gupt, and T. R. Bromley, Quantum computational finance: Monte carlo pricing of financial derivatives, Phys. Rev. A98, 022321 (2018)
2018
-
[5]
Woerner and D
S. Woerner and D. J. Egger, Quantum risk analysis, npj Quantum Information5, 15 (2019)
2019
-
[6]
Stamatopoulos and W
N. Stamatopoulos and W. J. Zeng, Derivative Pricing using Quantum Signal Processing, Quantum8, 1322 (2024)
2024
Show all 28 references
-
[7]
Beauregard, Circuit for Shor’s algorithm using 2n+3 qubits, Quantum Info
S. Beauregard, Circuit for Shor’s algorithm using 2n+3 qubits, Quantum Info. Comput.3, 175–185 (2003)
2003
-
[8]
Gidney and M
C. Gidney and M. Eker ˚ a, How to factor 2048 bit RSA in- tegers in 8 hours using 20 million noisy qubits, Quantum 5, 433 (2021)
-
[9]
Montanaro, Quantum algorithms: an overview, npj Quantum Information2, 15023 (2016)
A. Montanaro, Quantum algorithms: an overview, npj Quantum Information2, 15023 (2016)
2016
-
[10]
Shahzad and O
K. Shahzad and O. U. Khan, A generalized space- efficient algorithm for quantum bit string comparators, arXiv:2311.06573 (2023), preprint, available athttps: //arxiv.org/abs/2311.06573
2023 arXiv
-
[12]
Takahashi, S
Y. Takahashi, S. Tani, and N. Kunihiro, Quantum ad- dition circuits and unbounded fan-out, Quantum Info. Comput.10, 872–890 (2010)
2010
-
[13]
Gidney, Halving the cost of quantum addition, Quan- tum2, 74 (2018)
C. Gidney, Halving the cost of quantum addition, Quan- tum2, 74 (2018)
2018
-
[14]
Nishio, Y
S. Nishio, Y. Pan, T. Satoh, H. Amano, and R. V. Me- ter, Extracting success from ibm’s 20-qubit machines us- ing error-aware compilation, J. Emerg. Technol. Comput. Syst.16, 10.1145/3386162 (2020)
2020 doi
-
[15]
A. Li, S. Stein, S. Krishnamoorthy, and J. Ang, Qasm- bench: A low-level quantum benchmark suite for nisq evaluation and simulation, ACM Transactions on Quan- tum Computing4, 10.1145/3550488 (2023)
2023 doi
-
[16]
Gedik, Optimization and ex- perimental realization of the quantum permutation algo- rithm, Physical Review A96, 062339 (2017)
˙Iskender Yal¸ cınkaya and Z. Gedik, Optimization and ex- perimental realization of the quantum permutation algo- rithm, Physical Review A96, 062339 (2017)
2017
-
[17]
Jakhodia, D
S. Jakhodia, D. Singh, and B. Jajodia, Experimen- tal Evaluation of QFT Adders on IBM QX Hardware, inEmerging Technologies for Computing, Communica- tion and Smart Cities, edited by P. K. Singh, M. H. Kolekar, S. Tanwar, S. T. Wierzcho´ n, and R. K. Bhat- nagar (Springer Natur...
2022
-
[18]
B. Gaur, E. Mu˜ noz Coreas, and H. Thapliyal, A loga- rithmic depth quantum carry-lookahead modulo (2 n −1) adder, inProceedings of the Great Lakes Symposium on VLSI 2023, GLSVLSI ’23 (Association for Computing Machinery, New York, NY, USA, 2023) p. 125–130
2023
-
[19]
Gaur and H
B. Gaur and H. Thapliyal, Novel optimized designs of modulo 2n+ 1 adder for quantum computing, IEEE Transactions on Very Large Scale Integration (VLSI) Sys- tems32, 1759 (2024)
2024
-
[20]
H. Xia, H. Li, H. Zhang, Y. Liang, and J. Xin, An effi- cient design of reversible multi-bit quantum comparator via only a single ancillary bit, International Journal of Theoretical Physics57, 3727 (2018)
2018
-
[22]
Shaydulin and A
R. Shaydulin and A. Galda, Error mitigation for deep quantum optimization circuits by leveraging problem symmetries, in2021 IEEE International Conference on Quantum Computing and Engineering (QCE)(2021) pp. 291–300
2021
-
[23]
Wright, N
K. Wright, N. C. Hutzler, U. Anand, and et al., Bench- marking an 11-qubit quantum computer, Nature Com- munications10, 5464 (2019)
2019
-
[24]
C. D. Bruzewicz, J. Chiaverini, R. McConnell, and J. M. Sage, Trapped-ion quantum computing: Progress and challenges, Applied Physics Reviews6, 021314 (2019)
2019
-
[25]
Georgescu, Trapped ion quantum computing turns 25, Nature Reviews Physics2, 278 (2020)
I. Georgescu, Trapped ion quantum computing turns 25, Nature Reviews Physics2, 278 (2020)
2020
-
[26]
Remaud, Optimizing t and cnot gates in quantum ripple-carry adders and comparators, inProceedings of Recent Advances in Quantum Computing and Technol- ogy, ReAQCT ’24 (ACM, 2024) p
M. Remaud, Optimizing t and cnot gates in quantum ripple-carry adders and comparators, inProceedings of Recent Advances in Quantum Computing and Technol- ogy, ReAQCT ’24 (ACM, 2024) p. 56–61
2024
-
[27]
Barenco, C
A. Barenco, C. H. Bennett, R. Cleve, D. P. DiVincenzo, N. Margolus, P. Shor, T. Sleator, J. A. Smolin, and H. Weinfurter, Elementary gates for quantum computa- tion, Phys. Rev. A52, 3457 (1995)
1995
-
[28]
Maslov, Advantages of using relative-phase toffoli gates with an application to multiple control toffoli opti- mization, Phys
D. Maslov, Advantages of using relative-phase toffoli gates with an application to multiple control toffoli opti- mization, Phys. Rev. A93, 022311 (2016)
2016
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