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arxiv 2302.10638 v1 pith:7WECDQ42 submitted 2023-02-21 cs.AR

ATA-Cache: Contention Mitigation for GPU Shared L1 Cache with Aggregated Tag Array

classification cs.AR
keywords cachecachescontentionshighsharedaggregatedarchitecturearray
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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GPU shared L1 cache is a promising architecture while still suffering from high resource contentions. We present a GPU shared L1 cache architecture with an aggregated tag array that minimizes the L1 cache contentions and takes full advantage of inter-core locality. The key idea is to decouple and aggregate the tag arrays of multiple L1 caches so that the cache requests can be compared with all tag arrays in parallel to probe the replicated data in other caches. The GPU caches are only accessed by other GPU cores when replicated data exists, filtering out unnecessary cache accesses that cause high resource contentions. The experimental results show that GPU IPC can be improved by 12% on average for applications with a high inter-core locality.

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