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Paper Citation Record · LEDGER

Energy and Performance Analysis of STTRAM Caches for Mobile Applications

As of 17 August 2026, this Paper Citation Record lists 26 of 26 outbound references and 0 inbound Pith citation observations for arXiv:1908.04744.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
1908.04744 v1

Coverage vector

measured 26 of 26 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-14T14:24:48.958449Z

measured 26 of 26 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-17T06:30:58.91139+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

26 of 26 outbound references displayed

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External citation measurements

No source-named external measurement is stored.

Outbound references

Observation acf60089-10d5-4059-b5e1-95f2c821a0ca · outbound

This paper cites Cortex-a76,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Cortex-a76,

Reference 1

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation fe840953-fc69-4cb9-add4-91de000fb5dd · outbound

This paper cites A survey of architectural techniques for improving cache power efficiency,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications A survey of architectural techniques for improving cache power efficiency,

Reference 2

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 07df63e4-8bb3-4875-8b7c-511e50c50b5d · outbound

This paper cites Spin-transfer torque mag- netic random access memory (stt-mram),.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Spin-transfer torque mag- netic random access memory (stt-mram),

Reference 3

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 0dac17d0-f885-4dd8-8997-f47cdf6bd50e · outbound

This paper cites An energy-efficient memory-based high-throughput vlsi architecture for convolutional networks,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications An energy-efficient memory-based high-throughput vlsi architecture for convolutional networks,

Reference 4

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 6cf60a64-f2cc-43bc-968c-fb32bdcfc56d · outbound

This paper cites Relaxing non-volatility for fast and energy-efficient stt-ram caches,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Relaxing non-volatility for fast and energy-efficient stt-ram caches,

Reference 5

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.851069Z digest=sha256:1a25ad4a067c2092b3376c3d2b4266e62534406cf44aa31792db9d53082cddca

Observation 0201eaa4-af61-4268-9244-7acb1315bdc8 · outbound

This paper cites Cache revive: architecting volatile stt-ram caches for enhanced performance in cmps,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Cache revive: architecting volatile stt-ram caches for enhanced performance in cmps,

Reference 6

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.856222Z digest=sha256:c01fed7dd8d425980881041041f687b90e6dba7d83ecf5c52d4b99c636ead443

Observation 83c40e7c-50be-4e65-9aa9-75e9d59f20df · outbound

This paper cites Cache decay: exploiting gen- erational behavior to reduce cache leakage power,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Cache decay: exploiting gen- erational behavior to reduce cache leakage power,

Reference 7

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.861900Z digest=sha256:b5b87229c5269163661af34d9fcca200037891affecd5139f7f3906514d05abf

Observation 3907df0d-ac83-4f96-8e29-b85fa09555d0 · outbound

This paper cites A scaling roadmap and performance evaluation of in-plane and perpendicular mtj based stt-mrams for high-density cache memory,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications A scaling roadmap and performance evaluation of in-plane and perpendicular mtj based stt-mrams for high-density cache memory,

Reference 8

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation f0c54c6f-03d1-4917-a4f0-aeedd32c356e · outbound

This paper cites Highly reliable and low-power nonvolatile cache memory with advanced perpendicular stt-mram for high-performance cpu,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Highly reliable and low-power nonvolatile cache memory with advanced perpendicular stt-mram for high-performance cpu,

Reference 9

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 1357e5a5-71be-4800-aac5-512d77544836 · outbound

This paper cites Multi retention level stt-ram cache designs with a dynamic refresh scheme,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Multi retention level stt-ram cache designs with a dynamic refresh scheme,

Reference 10

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 18bd21e6-d7e6-4050-957a-253b4844a604 · outbound

This paper cites A coherent hybrid sram and stt-ram l1 cache architecture for shared memory multicores,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications A coherent hybrid sram and stt-ram l1 cache architecture for shared memory multicores,

Reference 11

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.882292Z digest=sha256:9e10421eadf5f12ba62eae88c72534efbc8be4e4f71cd013d646e5c7a3f6e2bb

Observation 4d7ec037-0941-45fd-a695-b3f0e13837dd · outbound

This paper cites Dasca: Dead write prediction assisted stt- ram cache architecture,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Dasca: Dead write prediction assisted stt- ram cache architecture,

Reference 12

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.887346Z digest=sha256:be77532547cc0491a56a423adcc27e1be860957b4ec03580aaee05044773885b

Observation c151edea-09bd-473a-ab74-72ae8b457cce · outbound

This paper cites Energy reduction for stt-ram using early write termination,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Energy reduction for stt-ram using early write termination,

Reference 13

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 46738999-0ae2-440f-bd20-20523b2ebfac · outbound

This paper cites Probabilistic replacement strategies for improving the lifetimes of nvm-based caches,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Probabilistic replacement strategies for improving the lifetimes of nvm-based caches,

Reference 14

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 1ebba81c-1945-4e3c-be68-0d03899b5c12 · outbound

This paper cites Brloop: Constructing balanced retimed loop to architect stt-ram-based hybrid cache for vliw processors,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Brloop: Constructing balanced retimed loop to architect stt-ram-based hybrid cache for vliw processors,

Reference 15

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 86a32eb1-40e6-4123-843a-39598f379780 · outbound

This paper cites Lars: Logically adaptable retention time sttram cache for embedded systems,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Lars: Logically adaptable retention time sttram cache for embedded systems,

Reference 16

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 1d075243-4604-44cd-a494-66c67bbb231f · outbound

This paper cites Spec cpu2006,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Spec cpu2006,

Reference 17

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 93721d21-0777-431e-9ad1-f965dafc8279 · outbound

This paper cites Exploring energy-efficient cache design in emerging mobile platforms,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Exploring energy-efficient cache design in emerging mobile platforms,

Reference 18

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.918153Z digest=sha256:8a52e677fb2beebb33610d52681bc3afa4dd1ac9a49bb1fc85c01301311feac8

Observation f8fa460c-7ed0-4e52-b33a-248450352bf8 · outbound

This paper cites The parsec benchmark suite: Characterization and architectural implications,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications The parsec benchmark suite: Characterization and architectural implications,

Reference 19

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 64414e33-ab36-43c5-89a0-0b89822ce06d · outbound

This paper cites Full-system analysis and characterization of interactive smartphone applications,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Full-system analysis and characterization of interactive smartphone applications,

Reference 20

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 36137791-d9f4-4254-a710-146ff7d312af · outbound

This paper cites Yield and reliability improvement techniques for emerging nonvolatile stt-mram,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Yield and reliability improvement techniques for emerging nonvolatile stt-mram,

Reference 21

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation 78a5d13a-641d-412a-9f7a-ef77eeff0663 · outbound

This paper cites Non-volatile processor based on mram for ultra-low-power iot devices,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Non-volatile processor based on mram for ultra-low-power iot devices,

Reference 22

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.938459Z digest=sha256:5970f5d7ad4b9f8bd8565cfa360272835bd079bd1a3e5bcdd92eb1a62c0352b8

Observation f3ffc3b2-15c4-42fb-9d5f-1da26234120a · outbound

This paper cites The gem5 simulator,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications The gem5 simulator,

Reference 23

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.943206Z digest=sha256:2923073cd707c391b29778cf03751d89bb06eb31add9bde512aa7856b4b2fbdf

Observation 1b812e56-72b7-4f9a-a235-2dfa7f843cbc · outbound

This paper cites Nvsim: A circuit-level performance, energy, and area model for emerging nonvolatile mem- ory,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Nvsim: A circuit-level performance, energy, and area model for emerging nonvolatile mem- ory,

Reference 24

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.948339Z digest=sha256:770b48ea5d7ce535b3782953fc425d930653cc2ed53e738a685b893cb8fb7fc1

Observation eabb4aa3-5446-40c0-ac04-296682b02fc2 · outbound

This paper cites Moby: A mobile benchmark suite for architectural simulators,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Moby: A mobile benchmark suite for architectural simulators,

Reference 25

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-14T14:24:48.953530Z digest=sha256:2b6cd27e3dcc1d3030a0d9b05074f1090b1c72b44c972d45b96af6928dd2055d

Observation ee5f5e91-2a36-478c-9110-1fa7521fb7b9 · outbound

This paper cites Halls: An energy-efficient highly adaptable last level stt-ram cache for multicore systems,.

Energy and Performance Analysis of STTRAM Caches for Mobile Applications Halls: An energy-efficient highly adaptable last level stt-ram cache for multicore systems,

Reference 26

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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