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arxiv: 2606.27002 · v1 · pith:DAMZYEQOnew · submitted 2026-06-25 · 📡 eess.SP · cs.AI· cs.AR· cs.SY· eess.SY

Inverse Design of Compact and Wideband Inverted Doherty Power Amplifiers Using Deep Learning

Pith reviewed 2026-06-26 02:35 UTC · model grok-4.3

classification 📡 eess.SP cs.AIcs.ARcs.SYeess.SY
keywords inverse designDoherty power amplifierdeep learningpixelated combinerGaN HEMTwideband amplifierconvolutional neural networkgenetic algorithm
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The pith

CNN and genetic algorithm jointly design pixelated combiner that packs load modulation, matching, combining and phase compensation into one structure for an inverted Doherty PA.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper establishes that convolutional neural networks paired with genetic algorithms can inversely synthesize pixelated Doherty combiner networks. These networks fold load modulation, impedance matching, power combining and phase compensation into a single compact layout. A GaN HEMT prototype built from the generated layout was fabricated and measured, showing 51-63 percent peak drain efficiency and 48-54 percent efficiency at 6 dB back-off across 1.9-2.5 GHz together with 44 dBm output power. After digital predistortion the adjacent-channel leakage ratio stays better than -53.2 dBc. The result demonstrates that the automated pipeline can produce a functional wideband inverted Doherty amplifier without conventional manual network tuning.

Core claim

Convolutional neural networks and genetic algorithms jointly generate pixelated Doherty combiner networks that integrate load modulation, impedance matching, power combining, and phase compensation into a single structure; a fabricated GaN HEMT prototype using one such network achieves 51-63 percent peak drain efficiency, 48-54 percent efficiency at 6 dB back-off, and 44 plus or minus 0.3 dBm output power from 1.9 to 2.5 GHz, with ACLR better than -53.2 dBc after DPD.

What carries the argument

The CNN-GA pipeline that produces pixelated Doherty combiner networks performing load modulation, impedance matching, power combining and phase compensation in one layout.

If this is right

  • Automated generation of compact wideband Doherty combiners becomes feasible without iterative manual electromagnetic optimization.
  • Multiple RF functions can be realized inside a single pixelated metal pattern, reducing overall circuit footprint.
  • The same pipeline can be reused for other frequency bands or output-power levels by retraining on appropriate simulation data.
  • Measured linearity after DPD meets typical base-station spectral requirements, showing the design is ready for linearization.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The method may scale to other PA topologies such as outphasing or envelope-tracking amplifiers if the training data set is expanded.
  • Higher pixel resolution or multi-layer pixelation could further shrink the combiner while preserving bandwidth.
  • The approach opens the possibility of co-optimizing the combiner together with the transistor bias network in a single inverse-design run.

Load-bearing premise

Electromagnetic simulations used during training accurately predict the fabricated combiner's behavior without large unmodeled effects from manufacturing tolerances or substrate variations.

What would settle it

Fabricate the designed pixelated combiner and measure drain efficiency below 48 percent at 6 dB back-off across most of the 1.9-2.5 GHz band.

Figures

Figures reproduced from arXiv: 2606.27002 by Christian Fager, David Widen, Han Zhou, Haojie Chang.

Figure 1
Figure 1. Figure 1: (a) Synthesis of the Doherty combiner with three implementations: [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Inverse-design workflow for pixelated conventional and inverted Doherty combiners using deep convolutional neural networks (CNNs) and a genetic [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Comparison of CNN-predicted (dashed) and EM-simulated (solid) [PITH_FULL_IMAGE:figures/full_fig_p002_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Circuit schematic of the proposed Inverted Doherty PA. [PITH_FULL_IMAGE:figures/full_fig_p003_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: The fabricated prototype circuit with dimensions of [PITH_FULL_IMAGE:figures/full_fig_p003_5.png] view at source ↗
Figure 8
Figure 8. Figure 8: Measured saturated output power, peak drain efficiency, and 6-dB [PITH_FULL_IMAGE:figures/full_fig_p003_8.png] view at source ↗
Figure 9
Figure 9. Figure 9: Normalized output spectrum of the fabricated prototype with a [PITH_FULL_IMAGE:figures/full_fig_p004_9.png] view at source ↗
read the original abstract

This paper presents a deep learning-assisted methodology for the inverse synthesis of a compact, wideband inverted Doherty power amplifier (PA). Convolutional neural networks (CNNs) and genetic algorithms (GAs) are jointly employed to generate pixelated Doherty combiner networks that integrate load modulation, impedance matching, power combining, and phase compensation into a single structure. As a proof of concept, we design and fabricate a GaN HEMT Doherty PA with a pixelated output combiner. The prototype achieves a measured peak drain efficiency of 51%-63% and a 6-dB back-off efficiency of 48%-54% over 1.9-2.5 GHz. Within the same frequency range, the measured output power is 44+/-0.3 dBm. Furthermore, with digital predistortion (DPD) applied, the prototype circuit demonstrates an adjacent channel leakage ratio (ACLR) better than -53.2 dBc.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 1 minor

Summary. The manuscript presents a deep learning-assisted inverse design method that combines convolutional neural networks (CNNs) and genetic algorithms (GAs) to synthesize pixelated output combiners for compact, wideband inverted Doherty power amplifiers. As a proof-of-concept, a GaN HEMT prototype is fabricated and measured, reporting peak drain efficiency of 51-63%, 6-dB back-off efficiency of 48-54% over 1.9-2.5 GHz, output power of 44±0.3 dBm, and ACLR better than -53.2 dBc with DPD applied.

Significance. If the measured results are reproducible and the DL pipeline is shown to be robust, the work would demonstrate a viable path for automating the design of complex, multi-function combiners in Doherty PAs, potentially enabling more compact wideband implementations than traditional analytical or optimization-only flows.

major comments (2)
  1. [Fabrication and measurement section] Fabrication and measurement section: The reported prototype performance relies on the pixelated combiner delivering the intended load-modulation trajectories, yet no measured vs. simulated S-parameters or load-pull data for the combiner alone are provided to quantify simulation-to-fabrication mismatch due to etch tolerances, substrate variation, or via placement.
  2. [Methodology section on CNN-GA pipeline] Methodology section on CNN-GA pipeline: No details are given on training dataset size, generation method, validation splits, hyperparameter selection, or any baseline comparison against conventional combiner design flows, leaving the contribution and reliability of the inverse-design step unsupported.
minor comments (1)
  1. [Abstract and results section] The abstract and results section should explicitly state the number of fabricated prototypes and any yield statistics to strengthen the measurement claims.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive comments. We address each major comment below, indicating planned revisions to strengthen the manuscript.

read point-by-point responses
  1. Referee: [Fabrication and measurement section] Fabrication and measurement section: The reported prototype performance relies on the pixelated combiner delivering the intended load-modulation trajectories, yet no measured vs. simulated S-parameters or load-pull data for the combiner alone are provided to quantify simulation-to-fabrication mismatch due to etch tolerances, substrate variation, or via placement.

    Authors: We agree that separate characterization of the combiner would provide stronger direct validation of the load-modulation trajectories. The integrated PA measurements (efficiency, output power, and ACLR) show close agreement with full-system simulations across 1.9-2.5 GHz, which indirectly supports the combiner performance. In revision we will add a dedicated paragraph in the fabrication/measurement section discussing expected fabrication tolerances, substrate variation, and via effects based on our EM sensitivity analysis. revision: partial

  2. Referee: [Methodology section on CNN-GA pipeline] Methodology section on CNN-GA pipeline: No details are given on training dataset size, generation method, validation splits, hyperparameter selection, or any baseline comparison against conventional combiner design flows, leaving the contribution and reliability of the inverse-design step unsupported.

    Authors: We will expand the methodology section to include the requested details: training dataset size and generation via full-wave EM simulations of pixelated structures, the 80/10/10 train/validation/test split, the hyperparameter selection procedure (grid search with cross-validation), and a quantitative comparison of the CNN-GA inverse design against a conventional gradient-based optimization flow in terms of convergence time and final combiner performance. revision: yes

Circularity Check

0 steps flagged

No circularity: claims rest on independent fabrication and measurement

full rationale

The paper's load-bearing claims are the measured drain efficiency, output power, and ACLR of a physically fabricated GaN HEMT prototype over 1.9-2.5 GHz. These quantities are obtained from hardware testing after the CNN-GA design step, not from any equation, fitted parameter, or self-citation that reduces back to the training data or simulation inputs by construction. The inverse-design pipeline is a generative tool whose output is externally validated by fabrication; no self-definitional loop, fitted-input prediction, or load-bearing self-citation is present in the derivation chain.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Only the abstract is available; no explicit free parameters, domain axioms, or invented entities are stated or inferable.

pith-pipeline@v0.9.1-grok · 5709 in / 1226 out tokens · 48604 ms · 2026-06-26T02:35:42.061267+00:00 · methodology

discussion (0)

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Reference graph

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