Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-05T16:37:10.050012Z
Paper Citation Record · LEDGER
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs
As of 21 August 2026, this Paper Citation Record lists 27 of 27 outbound references and 1 inbound Pith citation observation for arXiv:2508.19299.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-20T06:33:59.587034+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-05T16:36:28.125160Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-08-05T16:36:28.207542Z
Reference resolution
27 of 27 outbound references displayed
- verified exact2
- verified fuzzy2
- unresolved21
- parse uncertain0
- malformed identifier1
- metadata mismatch1
External citation measurements
No source-named external measurement is stored.
Outbound references
Observation c82dec5f-c73e-4629-8e15-fd29e9cd4022 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 1
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.704954Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 8189fc3d-28c1-403d-b5ea-e5962bbbd7f0 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 2
- Resolution
- metadata mismatch
- raw_fallback, observed 2026-08-05T16:37:10.562661Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 34e37a71-d2a0-4fda-a6a4-2c1eed15f1a3 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 3
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.697513Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 9336c3f6-8218-4058-ab0e-a20229d0aba9 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 4
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.689919Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 028c295a-0ec5-4fbd-b8ff-f5952e691956 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 5
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.682194Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 7b3690b5-0b15-4652-a8b2-506c08a2be89 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 6
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.674926Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 0ffd30d5-edf7-4d15-9be2-22f7a7f2a821 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 7
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.667563Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation b2e4d961-4677-4800-9f10-104835e3e5ef · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 8
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.659778Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 5f6a3493-9d10-46eb-8a77-d6b9d5c7f0db · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 9
- Resolution
- malformed identifier
- no resolver link, observed 2026-08-05T16:37:10.002360Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 40ed5732-77c3-42e2-82f7-624e18678aa0 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 10
- Resolution
- unresolved
- no resolver link, observed 2026-08-05T16:37:10.005219Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 47068e49-4b69-4f0d-bf4b-48e3c168c545 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 11
- Resolution
- unresolved
- no resolver link, observed 2026-08-05T16:37:10.007575Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation cc2c0ca5-1d8b-4166-8617-d9703c7ae0fa · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 12
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.652084Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 561ece0a-b2e3-40a7-96e4-7453a8429748 · outbound
This paper cites Parallel Programming for FPGAs.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Parallel Programming for FPGAs
Reference 13
- Resolution
- unresolved
- no resolver link, observed 2026-08-05T16:37:10.012593Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation cfd45bdc-ba75-497e-a9a9-afe2162f1bf5 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 14
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.644584Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 56b1feb3-a1a0-43a9-a705-4ca1cec1b046 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 15
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.637349Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 5907baff-43a4-4605-abc7-69635c670e51 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 16
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.629795Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation ea1a4e1d-24a0-46b0-bce5-ee1200c022c3 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 18
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.622085Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 9fe85a37-d246-4762-b5af-a2fdfada36a6 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 19
- Resolution
- verified exact
- raw_fallback, observed 2026-08-05T16:37:10.294242Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 2f6e66c3-3cd7-43e4-946a-077d910ad306 · outbound
This paper cites In 2023 IEEE International Symposium on High- Performance Computer Architecture (HPCA).
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs In 2023 IEEE International Symposium on High- Performance Computer Architecture (HPCA)
Reference 20
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-05T16:37:10.605963Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 9c532c99-43cc-47da-a5f3-9e2398587dc8 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 21
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.596932Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation b4675b7b-1957-4b09-be8d-fe0f01378877 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 22
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.589268Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 41d0bcfb-106f-4493-a2f3-262a2a2f251e · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 23
- Resolution
- unresolved
- no resolver link, observed 2026-08-05T16:37:10.037757Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation f0258133-e24e-4dc1-9888-05bdd8ed077a · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 24
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.573269Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 119658fc-73b4-409b-a8bf-0c3cef984a46 · outbound
This paper cites Faber, Roger D.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Faber, Roger D
Reference 25
- Resolution
- verified exact
- doi, observed 2026-08-05T16:37:10.076447Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation 623b84a9-9d62-43ea-8b46-d5efd498e611 · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 26
- Resolution
- unresolved
- raw_fallback, observed 2026-08-05T16:37:10.581090Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Observation ce4955aa-b9da-4260-a653-523f6fd96ebe · outbound
This paper cites an unresolved cited work.
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs Unresolved cited work
Reference 1112
- Resolution
- unresolved
- no resolver link, observed 2026-08-05T16:37:10.033001Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation b52ed81f-1f92-436c-81e3-5d128e90b55f · outbound
This paper cites In 2023 IEEE International Symposium on High- Performance Computer Architecture (HPCA).
OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs In 2023 IEEE International Symposium on High- Performance Computer Architecture (HPCA)
Reference 2023
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-05T16:37:10.614541Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.
Pith citing papers
Observation 2cd74862-fc33-41a5-ae45-40a1b28a5ba0 · inbound
Three-Dimensional Continuous Multi-Walled Carbon Nanotubes Network-Toughened Diamond Composite cites this paper.
Three-Dimensional Continuous Multi-Walled Carbon Nanotubes Network-Toughened Diamond Composite OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs
Reference 21
- Resolution
- metadata mismatch
- local_arxiv, observed 2026-08-05T16:36:28.373291Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.