Nanomagnetic Logic and Magnetization Switching Dynamics in Spin Torque Majority Gates

Spin torque majority gates are modeled and several regimes of magnetization switching (some leading to failure) are discovered. The switching speed and noise margins are determined for STMGs and an adder based on it. With switching time of 3ns at current of 80uA, the adder computational throughput is comparable to that of a CMOS adder.