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Exploiting Errors for Efficiency: A Survey from Circuits to Algorithms

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arxiv 1809.05859 v1 pith:EAKRWY2X submitted 2018-09-16 cs.AR cs.ETcs.PL

Exploiting Errors for Efficiency: A Survey from Circuits to Algorithms

classification cs.AR cs.ETcs.PL
keywords errorslayersurveysystemsystemsacrosscircuitscomputer
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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When a computational task tolerates a relaxation of its specification or when an algorithm tolerates the effects of noise in its execution, hardware, programming languages, and system software can trade deviations from correct behavior for lower resource usage. We present, for the first time, a synthesis of research results on computing systems that only make as many errors as their users can tolerate, from across the disciplines of computer aided design of circuits, digital system design, computer architecture, programming languages, operating systems, and information theory. Rather than over-provisioning resources at each layer to avoid errors, it can be more efficient to exploit the masking of errors occurring at one layer which can prevent them from propagating to a higher layer. We survey tradeoffs for individual layers of computing systems from the circuit level to the operating system level and illustrate the potential benefits of end-to-end approaches using two illustrative examples. To tie together the survey, we present a consistent formalization of terminology, across the layers, which does not significantly deviate from the terminology traditionally used by research communities in their layer of focus.

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