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REVIEW 5 major objections 4 minor 46 references

JAQ: Joint Efficient Architecture Design and Low-Bit Quantization with Hardware-Software Co-Exploration

T0 review · 5 major / 4 minor · reviewed 2026-08-10 · deepseek-v4-flash

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Pith's one-line read JAQ claims the first joint co-search over network architecture, 2-to-8-bit mixed precision, and accelerator design, reporting about 7% higher ImageNet Top-1 accuracy than the prior joint-search method and 0.15-second-per-iteration…

desk verdict Real engineering step in low-bit HW-SW co-search, but the search ranks candidates with only 3% of activations quantized and never shows that ranking survives full quantization — so the 7% ImageNet claim rests on an untested transfer. read the letter →

arxiv 2501.05339 v1 pith:ERJYFKUG submitted 2025-01-09 cs.CV

Mingzi Wang , Yuan Meng , Chen Tang , Weixiang Zhang , Yijian Qin , Yang Yao , Yingxin Li , Tongtong Feng
show 4 more authors
Xin Wang Xun Guan Zhi Wang Wenwu Zhu
This is my paper · ORCID
classification cs.CV
keywords jointneuralarchitecturesearchmixed-precisionquantizationhardware-softwareco-designchannel-wisesparsecompilermappingdifferentiablelow-bitedgedeployment
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

JAQ claims the first end-to-end co-search that covers all three dimensions at once: the network architecture, the per-layer bitwidth allocation (2, 4, or 8 bits for weights and activations), and the accelerator configuration including compiler tiling. The motivation is that model-only or hardware-only design lands in suboptimal regions, especially at very low precision, where naive quantization-aware joint search suffers memory blow-up and slow hardware evaluation. JAQ removes the memory bottleneck with channel-wise sparse quantization, quantizing only the most sensitive activation channels during search, and removes the hardware-search bottleneck with BatchTile, which encodes all tiling strategies as batches so latency and energy can be estimated in one pass. On CIFAR-10, CIFAR-100, and ImageNet the framework reports roughly 7 percentage points higher Top-1 accuracy than the Auto-NBA baseline at similar hardware cost, with accelerator search time down to about 0.15 seconds per iteration. If these numbers hold, JAQ makes genuine software-hardware co-design practical for low-bit edge deployment.

What carries the argument

The load-bearing object is the joint differentiable objective $L_{CE}(w, N(\alpha), M(\beta)) + \lambda E_{HW}(H(\gamma), N(\alpha), M(\beta))$, optimized end-to-end over three coupled parameter sets: architecture $\alpha$, bitwidth $\beta$, and accelerator $\gamma$. Two mechanisms carry it. CSQ (Eq. 6 and Eq. 8) restricts activation quantization during search to the top $K\%$ of channels ranked by BatchNorm scale factors, so the memory cost of quantized activations does not scale with the number of bitwidth candidates; this is what lets 2-bit options enter the search without collapsing it. BatchTile packs every candidate tiling strategy for every operator into a single batched evaluation through a hardware generation network, turning the discrete compiler-mapping search into one forward pass rather than a per-tile enumeration; this is what brings per-iteration accelerator search to 0.15 seconds.

What would settle it

Retrain the K=3% searched subnet with full 2/4/8-bit quantization and measure validation accuracy; then repeat the search with all activation channels quantized (K=100%) or with a low-bit constrained baseline under the same retraining budget. If the K=3% subnet does not match or beat the constrained-search subnet, the near-full-precision ranking does not transfer to the low-bit regime.

Watch

Extended reading notes

Core claim

On its own terms, JAQ's discovery is that ultra-low-precision joint search fails not because the search space is too large but because existing differentiable co-search has two tractable bottlenecks: activation memory and compiler-mapping evaluation. Both can be removed without giving up end-to-end differentiability. The paper formulates joint optimization as minimizing cross-entropy plus a hardware cost over architecture parameters $\alpha$, bitwidth parameters $\beta$, and accelerator parameters $\gamma$, and solves it with Gumbel-Softmax classifiers so the accelerator parameters are differentiable too. Channel-wise sparse quantization (CSQ) keeps the top $K=3\%$ of activation channels quantized while the rest stay full precision, with the top channels selected by BatchNorm scale factors; this cuts GPU memory roughly fivefold and eliminates the parameter coupling and misguided-search failures the paper documents in Auto-NBA when 2-bit options enter the search. BatchTile feeds many (operator, accelerator, tiling) triples as a batch through the hardware energy/latency estimator, compressing the compiler-mapping search to about 0.15 seconds per iteration. The reported outcome is a searched subnet, bitwidth assignment, and accelerator that jointly beat the previous joint-search method by about 7 Top-1 accuracy points on ImageNet while keeping comparable or better hardware cost.

Load-bearing premise

The search-stage ranking is done while only the top 3% of activation channels are quantized, so the architecture and bitwidth choices are effectively chosen in a nearly full-precision model; the entire result rests on those choices still being near-optimal after the final fully quantized retraining.

Editorial extensions

If this is right

  • JAQ's ImageNet result is a specific FBNet-style subnet with mixed 2/4/8-bit weights and activations paired with a co-searched accelerator (PE array, cache sizes, dataflow), reaching around 70% Top-1 accuracy at hardware cost comparable to or better than Auto-NBA.
  • CSQ reduces GPU memory by roughly 5x relative to unoptimized joint search and removes the parameter coupling and misguided-search failures that the paper shows for Auto-NBA when 2-bit options are available.
  • BatchTile cuts per-iteration hardware search from about 30 seconds (Auto-NBA) to 0.15 seconds, bringing the full ImageNet co-search to about 160 GPU-hours.
  • By adjusting the cost weights in Eq. 9, the same pipeline can be tilted toward latency, area, or energy, and the returned accelerator changes accordingly (for example, making the search latency-sensitive yields a lower-latency accelerator, while an area-sensitive weight yields a much smaller one).

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The search stage ranks architectures and bitwidths while only the top 3% of activation channels are quantized, so a direct test of whether that near-full-precision ranking matches the fully quantized retrained accuracy would settle how much of the reported 7-point gain is real search improvement versus retraining artifact.
  • The same BatchTile mechanism could transfer to transformer or LLM workloads, where tile mapping on tensor cores or NPUs dominates compile time and where low-bit weight-only quantization is already standard.
  • Because the accelerator search needs only a cost estimator and a user-defined search space, JAQ could become a per-device customization tool: finding a fresh accelerator configuration for each target deployment becomes cheap enough to run on a single GPU overnight.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

5 major / 4 minor

Summary. The paper proposes JAQ, a differentiable framework that jointly searches a CNN architecture, per-layer mixed-precision bitwidths (2/4/8 bits for weights and activations), and an accelerator configuration (PE array, caches, dataflow, and compiler tiling). To reduce GPU memory during search, it introduces channel-wise sparse quantization (CSQ), which quantizes only the top K=3% most sensitive activation channels per layer (Eq. 6 and Eq. 8) while leaving the rest in full precision. To speed up hardware search, it proposes BatchTile, which encodes tiling options as batches so that compiler mapping and accelerator parameters can be evaluated quickly with a learned estimator. The searched subnet is then retrained fully quantized. Experiments on CIFAR-10, CIFAR-100, and ImageNet compare JAQ with Auto-NBA and report roughly 7% higher ImageNet Top-1 accuracy at similar or lower estimated hardware cost, plus a per-iteration accelerator search time of 0.15 seconds.

Significance. If the claims hold, JAQ would be a useful step toward end-to-end software/hardware co-design at very low bitwidths: it is, to my knowledge, the first published framework that jointly searches architecture, 2-to-8-bit mixed quantization, and accelerator configuration, and it identifies a genuine failure mode of Auto-NBA under low-bit search (the 'misguided search' phenomenon in Table 6 and Appendix B). The CSQ memory reduction and the BatchTile speedup are practical contributions, and the released code improves reproducibility. The significance is currently tempered by two unverified assumptions: (i) the CSQ proxy with K=3% activation-channel quantization ranks subnets and bitwidths the same way as fully quantized deployment, and (ii) the hardware estimator used as the search objective gives trustworthy absolute energy/latency/area numbers. Both are testable, so the paper's contribution is defensible but needs additional evidencebefore the headline claims can be accepted at face value.

major comments (5)
  1. [§3.2, Eq. (6), Eq. (8); Experimental Settings; Retraining] The CSQ proxy-transfer assumption is untested and load-bearing. During search, only the top K=3% of activation channels per layer are quantized (Eq. 6 with K=3 in Experimental Settings); the remaining 97% flow at full precision. The final subnet is retrained with all activations quantized to 2/4/8 bits. The paper never shows that the near-full-precision search ranking of architecture parameters α and activation-bitwidth parameters βa is preserved under full quantization. Table 6 only varies K from 1 to 5 inside the proxy; it does not compare against K=100 (all channels quantized) or a fully-quantized ranking oracle. Since the headline 7% ImageNet advantage over Auto-NBA (Table 3) is measured after full quantization, this transfer assumption must be validated. Please add a fully-quantized search/oracle comparison, or at least rank a sample of searched subnets under both the proxy and full quantization and report rank correlation.
  2. [§3.3, Eq. (9); Tables 3 and 5] The hardware-efficiency claims are circular as reported. The hardware cost function EHW in Eq. (9) is both the search objective and the source of the reported energy/latency/area/EDAP numbers in Tables 3 and 5. No independent calibration of this estimator against a synthesized accelerator, an FPGA prototype, or an established cycle-accurate simulator is provided. Thus the tables do not provide external evidence that JAQ actually improves hardware efficiency. Please validate the estimator on at least one concrete accelerator configuration and report estimation error, or explicitly state that all hardware numbers are model predictions rather than measured results.
  3. [§4.2, Table 3] The accuracy comparison is against a single baseline, Auto-NBA, with no multiple seeds or error bars, despite the abstract's claim of 'approximately 7% higher Top-1 accuracy compared to previous methods.' DANCE, NAAS, OQAT, and BatchQuant are mentioned in Table 4 but are not compared on accuracy in the joint-search setting. Please add at least one additional joint-search baseline and report mean±standard deviation over multiple runs, or justify why a single run is sufficient for the claimed margin.
  4. [§3.1, Eq. (1)] Equation (1) is not Gumbel-Softmax as written. The equation uses ε ∼ U(0,1), which is additive uniform noise, whereas Gumbel-Softmax requires Gumbel noise (e.g., −log(−log U)). If the implementation actually uses Gumbel noise, the equation must be corrected; if uniform noise is used, the term 'Gumbel-Softmax' should be removed and the effect on architecture-parameter optimization should be discussed. This is a central search mechanism, so the discrepancy must be resolved.
  5. [Table 6 vs. Experimental Settings] There is a mismatch in the bitwidth search space. The main text and Experimental Settings state that each layer has three bitwidth options in [2,4,8], but Table 6's caption says the ablation searches over 2, 3, and 4-bit bitwidths. Please reconcile the two; if the main experiments also used 2/3/4, the text and tables must be updated, since the 'misguided search' analysis in Table 6 is used to justify the CSQ design and should be on the same search space as the main results.
minor comments (4)
  1. [Abstract] There is a typo in the abstract: 'Specifical' should be 'Specifically'.
  2. [Table 2] The header row 'B/b OW/ow OH/oh IC/ic OC/oc' is hard to parse; please define the uppercase and lowercase symbols in the caption or text.
  3. [Table 4 and Table 7] Table 4 reports total search time in GPU hours (160 for JAQ, 180 for Auto-NBA), while Table 7 reports per-iteration accelerator search time in seconds. Please clarify this distinction in the text so readers do not confuse per-iteration speed with total search cost.
  4. [Eq. (8)] The summation index set for Γl_j is written as 'j ∈ N^{l−1}' but the domain of j is not defined before use; please specify the channel index range explicitly.

Circularity Check

1 steps flagged · score 2.0 of 10

No circularity in the accuracy chain; one in-sample hardware-cost reporting issue lowers the hardware-efficiency claims.

  1. fitted input called prediction [JAQ Framework, Eq. 9; Experiments, Co-exploration Results, Tables 3 and 5]
    "Combining these three metrics, the hardware cost function included in Eq. 4 is: EHW = λE · Energy + λL · Latency + λA · Area, (9) ... As shown in Tab. 5, for instance, increasing the λL results in a low latency in the final result. Conversely, increasing the λA leads to a tiny area for the accelerator."

    The accelerator parameters γ and tiling strategies are selected by minimizing EHW (Eq. 9); the same EHW-based Energy/Latency/Area values are then reported as the achieved hardware performance in Table 3 (EDAP) and Table 5 (Latency/Energy/Area). No independent hardware measurement or external simulator is run, so the reported efficiency numbers are in-sample values of the very cost model that was minimized during search. The 'hardware-efficient design' result is therefore partly forced by construction: minimizing the estimator guarantees the reported estimator values improve, and the tables cannot validate the accelerator on real hardware or an independent cost model.

full rationale

The central accuracy claim is not circular: the searched subnet and bitwidth allocation are retrained from scratch (600 epochs on CIFAR, 180 on ImageNet) and evaluated on held-out test data, independent of the search objective. The comparison with Auto-NBA is a genuine empirical comparison. The K=3 sparse-quantization search proxy is a transfer-risk concern rather than circularity, because it does not define the final accuracy. The main circularity-adjacent issue is that the hardware-efficiency metrics (energy, latency, area, EDAP) are produced by the same estimator used as the search objective (Eq. 9, following Choi et al. 2021), so the reported hardware numbers are in-sample and do not constitute independent validation. This does not undermine the ImageNet accuracy result or the 0.15s search-time measurement, but it means the hardware-efficiency claims should be read as cost-model evaluations rather than measured hardware performance. No load-bearing self-citation or definitional equivalence was found.

Assumptions & free parameters 4 free parameters · 4 assumptions · 0 invented entities

The free parameters are hand-set hyperparameters (K, λ, λE/λL/λA, τ); none is fitted to the final accuracy values, so the accuracy comparison is not circular by construction. The load-bearing assumptions are the BN-gamma importance proxy, the unvalidated hardware cost model, the near-full-precision search-to-deployment transfer, and standard DNAS gradient machinery. No new physical entities are invented.

free parameters (4)
  • K (top % of activation channels quantized during search) = 3
    Set by hand after ablations with K=1 and K=5 (Table 6); controls the memory-vs-fidelity trade-off of the channel-wise sparse quantization and is central to the search behavior.
  • λ (Lagrange multiplier) = 0.0005, 0.001, 0.002, 0.004 (CIFAR); 0.001, 0.002, 0.005 (ImageNet)
    Trade-off weight between classification loss and hardware cost in Eq. 4; chosen to trace accuracy/efficiency Pareto curves.
  • λE, λL, λA (hardware cost weights) = 0.33 each in main experiments; 0.1/0.8/0.1 and 0.1/0.1/0.8 in sensitivity experiments
    Weights of energy, latency, and area in Eq. 9; set by hand to steer the searched accelerator toward different hardware objectives.
  • Gumbel-Softmax temperature τ = initial 5
    Controls the smoothness of the categorical relaxation in Eq. 1; standard DNAS hyperparameter.
assumptions (4)
  • domain assumption Batch-normalization scale factors γ reliably rank activation-channel importance for quantization.
    Used in Eq. 8 to pick the top K% channels to quantize; borrowed from network slimming (Liu et al. 2017) without a dedicated validation that this importance proxy matches quantization sensitivity.
  • domain assumption The internal Energy & Latency Estimator (following Choi et al. 2021) predicts real accelerator latency, energy, and area accurately for the BitFusion template.
    Every reported hardware metric in Tables 2, 3, and 5 comes from this estimator; the paper provides no comparison against measured silicon or a cycle-accurate simulator.
  • ad hoc to paper The ranking of subnets under CSQ (only 3% of activation channels quantized) transfers to the fully quantized retrained subnet.
    Eqs. 5-6 and Experimental Settings (K=3) leave most activations in full precision during search, while deployment is fully quantized; the paper does not check search-retrain correlation.
  • standard math Gumbel-Softmax with straight-through estimation gives faithful gradients for discrete architecture and bitwidth choices.
    Standard DNAS machinery (Eq. 1), used here for both α and β parameters.

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Cite this review

Pith. "Pith review of JAQ: Joint Efficient Architecture Design and Low-Bit Quantization with Hardware-Software Co-Exploration." pith.science (2026). https://pith.science/paper/ERJYFKUG

@misc{pith2026250105339,
  author       = {Pith},
  title        = {Pith review of: JAQ: Joint Efficient Architecture Design and Low-Bit Quantization with Hardware-Software Co-Exploration},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/ERJYFKUG}},
  note         = {Machine review of arXiv:2501.05339}
}
read the original abstract

The co-design of neural network architectures, quantization precisions, and hardware accelerators offers a promising approach to achieving an optimal balance between performance and efficiency, particularly for model deployment on resource-constrained edge devices. In this work, we propose the JAQ Framework, which jointly optimizes the three critical dimensions. However, effectively automating the design process across the vast search space of those three dimensions poses significant challenges, especially when pursuing extremely low-bit quantization. Specifical, the primary challenges include: (1) Memory overhead in software-side: Low-precision quantization-aware training can lead to significant memory usage due to storing large intermediate features and latent weights for back-propagation, potentially causing memory exhaustion. (2) Search time-consuming in hardware-side: The discrete nature of hardware parameters and the complex interplay between compiler optimizations and individual operators make the accelerator search time-consuming. To address these issues, JAQ mitigates the memory overhead through a channel-wise sparse quantization (CSQ) scheme, selectively applying quantization to the most sensitive components of the model during optimization. Additionally, JAQ designs BatchTile, which employs a hardware generation network to encode all possible tiling modes, thereby speeding up the search for the optimal compiler mapping strategy. Extensive experiments demonstrate the effectiveness of JAQ, achieving approximately 7% higher Top-1 accuracy on ImageNet compared to previous methods and reducing the hardware search time per iteration to 0.15 seconds.

Figures

Figures reproduced from arXiv: 2501.05339 by the authors.

Figure 1
Figure 1. JAQ framework. The left part represents the optimization of network structure and bitwidths allocation, addressing [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. (a) depicts the GPU memory usage with increasing bitwidths choices on CIFAR-100 and ImageNet (batch size is 128). [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 3
Figure 3. The overall accelerator search framework of JAQ. The right part represents the executing workload of a CNN operator [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figures from the paper (2 more)
Figure 4
Figure 4. Figure 4: Visualization of searched network, bitwidths and [PITH_FULL_IMAGE:figures/full_fig_p007_4.png]
Figure 5
Figure 5. Figure 5: (a) and (c) demonstrate the problems of parame [PITH_FULL_IMAGE:figures/full_fig_p010_5.png]

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Pith tools

Reviewed August 10, 2026 · model on record in the stance chip above.