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GainSight: A Unified Framework for Data Lifetime Profiling and Heterogeneous Memory Composition
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As AI workloads drive increasing memory requirements, domain-specific accelerators need higher-density on-chip memory beyond what current SRAM scaling trends can provide. Simultaneously, the vast amounts of short-lived data in these workloads make SRAM overprovisioned in retention capability. To address this mismatch, we propose a wholesale shift from uniform SRAM arrays to heterogeneous on-chip memory, incorporating denser short-term RAM (StRAM) devices whose limited retention times align with transient data lifetimes. To facilitate this shift, we introduce GainSight, the first comprehensive, open-source framework that aligns dynamic, fine-grained workload lifetime profiles with memory device characteristics to enable generation of optimal StRAM memory compositions. GainSight combines retargetable profiling backends with an architecture-agnostic analytical frontend. The various backends capture cycle-accurate data lifetimes, while the frontend correlates workload patterns with StRAM retention properties to generate optimal memory compositions and project performance. GainSight elevates data lifetime to a first-class design consideration for next-generation AI accelerators, enabling systematic exploitation of data transience for improved on-chip memory density and efficiency. Applying GainSight to MLPerf Inference and PolyBench workloads reveals that 64.3% of first-level GPU cache accesses and 79.01% of systolic array scratchpad accesses exhibit sub-microsecond lifetimes suitable for high-density StRAM, with optimal heterogeneous on-chip memory compositions achieving up to 3x active energy and 4x area reductions compared to uniform SRAM hierarchies. To facilitate adoption and further research, GainSight is open-sourced at https://gainsight.stanford.edu/.
Forward citations
Cited by 3 Pith papers
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OpenGCRAM: An Open-Source Gain Cell Compiler Enabling Design-Space Exploration for AI Workloads
OpenGCRAM automatically generates layout-ready GCRAM memory banks and simulates their area, speed, and power, enabling designers to explore GCRAM configurations for AI workloads.
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CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms
Monolithic 3D-stacked amorphous-oxide-semiconductor memories can replace SRAM in GPU register files and L2 caches, delivering higher density, lower standby power, and up to 5x performance per watt in simulation.
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Reducing Power Consumption of Embedded Dynamic Memories with ECCs
For retention-limited GCRAM, the minimum-power ECC is workload-dependent — strong BCH codes win when refresh dominates, light codes win under heavy access — giving modeled total-power reductions of 46.8-94.8%.
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