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REVIEW 3 major objections 5 minor 24 references

Improved circuits for a biologically-inspired random pulse computer

T0 review · 3 major / 5 minor · reviewed 2026-08-14 · deepseek-v4-flash

Pith's one-line read Entropy-preserving circuits cut random-pulse computing errors by 10 to 100 times.

desk verdict Solid experimental paper on random-pulse-computing circuits whose entropy-budget criterion is a textbook bound and whose impossibility claims are conditional on a definitional choice the paper itself later relaxes. read the letter →

arxiv 1908.04779 v4 pith:HPQOGDQD submitted 2019-08-13 cs.ET quant-ph

classification cs.ETquant-ph
keywords entropybudgetcriterionrandompulsecomputingflip-floprelativestochasticbinomialtraindivisioncircuitsubtraction
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper argues that a random pulse computer needs more than individually precise arithmetic circuits: it needs circuits whose output pulse trains stay genuinely random. The authors introduce an entropy budget criterion, stating that the entropy of a circuit's output cannot exceed the entropy supplied by its inputs plus any entropy generated inside the circuit. Because conventional deterministic division and subtraction circuits violate this budget over large parts of their input range, the paper concludes they cannot work correctly without an internal source of true randomness. It builds new versions around a quantum-random flip-flop and measures that, when followed by a squaring circuit, these entropy-preserving versions produce one to two orders of magnitude smaller total error than the older pseudorandom-register versions. The reader should care because this identifies output randomness itself as part of numerical precision, not a side effect.

What carries the argument

The load-bearing object is the entropy budget criterion (EBC), applied to time-discrete random pulse trains in which each time slot independently contains a pulse with probability $p$, so the maximum entropy of the train is $H_1(p) = -p\log_2 p - (1-p)\log_2(1-p)$. The paper defines relative entropy $H_{\mathrm{rel}} = H(\boldsymbol{x})/H_1(\boldsymbol{x})$ to quantify how close a circuit's output is to a true independent binomial stream. The second central component is the random flip-flop (RFF), a T-flip-flop whose clock acts with probability $1/2$ because it is driven by quantum-random photon detections; it supplies exactly the entropy that deterministic dividers and subtractors lack. The EBC identifies which operations demand internal randomness, the RFF supplies that randomness, and the squaring-circuit test exposes the downstream numerical cost when it is missing.

What would settle it

Build a downstream multiplication or squaring circuit and feed it pulse trains with identical pulse rate, one a true independent random stream and one deliberately patterned, such as an exactly alternating 0-1 sequence at probability 0.5. If the patterned train produces no larger error than the random train, then non-maximal output entropy is not itself the error source and the central claim fails; if the error grows as entropy drops while the rate stays fixed, the claim is supported.

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Extended reading notes

Core claim

The central claim is that the precision of a cascaded random-pulse computation is governed by the per-bit Shannon entropy of each intermediate pulse train. A circuit that outputs the correct average pulse rate but with low relative entropy, for example long bursts of pulses separated by long silences, hands its downstream neighbor signals that are no longer independent binomial variates, and calculations that assume independence accumulate error. The paper establishes an entropy budget criterion, $H(\boldsymbol{x}_z) \le H(\boldsymbol{x}_{\mathrm{circ}}) + \sum_i H(\boldsymbol{x}_i)$ for any circuit, and uses it to show that deterministic circuits for half-sum and division are impossible over significant regions of input space, while subtraction is not forbidden by the budget but remains unrealized deterministically. The measured demonstration is the cascade test: the RFF-based circuits DIV2 and SUB2 maintain high output relative entropy, and when followed by a squaring circuit their total error is one to two orders of magnitude smaller than that of the LFSR-based DIV1 and SUB1, whereas the cheap deterministic DIV3 and SUB3 are the most precise but only suitable as final stages in a calculation chain.

Load-bearing premise

Everything rests on the assumption that a valid number in this computer must be a maximally random independent pulse train at the right average rate, so a lower-entropy train with the same rate does not count as the same number; if low-entropy representations are accepted, the entropy-budget impossibility results no longer apply.

Editorial extensions

If this is right

  • Circuit designers should screen stochastic-computing gates by output relative entropy, not only by transfer-function error, since low-entropy outputs become a source of error in every downstream stage.
  • The entropy budget criterion makes a structural prediction: half-sum and division cannot be built deterministically over their full input range, so a universal random-pulse computer needs internal random sources inside these units.
  • Interior nodes of a calculation network should favor the RFF-based DIV2 and SUB2, while the precise but low-entropy DIV3 and SUB3 are best reserved for final outputs or for restricted input regions such as divisors at or below 0.1.
  • The proposed comparator circuit supplies the missing flow-control primitive for programmable random-pulse computing, and its switching sharpness grows exponentially with counter bit-length, so decision logic can be made arbitrarily sharp at the cost of counter size.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The entropy-budget screening should transfer directly to other stochastic-computing operations: any proposed gate whose output entropy exceeds its input entropy at some point of its domain will require an internal true-random source, so the criterion can serve as a fast pre-hardware filter.
  • A testable extension would sweep input relative entropy at fixed pulse probability into a fixed downstream circuit and measure error versus $H_{\mathrm{rel}}$; the paper's mechanism predicts a monotone error increase, but no measurement in the paper isolates that curve.
  • The burstiness of DIV3 and SUB3 outputs makes their estimates converge faster than high-entropy exponential-distribution trains, so a hybrid architecture could deliberately use low-entropy fast circuits for early approximate answers and switch to entropy-preserving circuits for refinement; the paper notes the speed advantage but does not propose this hybrid.
  • Because the paper identifies counters, comparators, and spontaneous random neural firing as biologically available primitives, its entropy-budget view suggests that biological neurons may face the same precision constraint and may need intrinsic firing noise to compute reliably.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 5 minor

Summary. The paper presents five new or improved circuits for random pulse computing (RPC), of which DIV2 and DIV3 are division circuits, SUB2 and SUB3 are subtraction circuits, and a magnitude comparator is also introduced. The work uses random flip-flops (RFFs) driven by quantum-photon-detection randomness as entropy sources, and introduces an 'entropy budget criterion' (EBC), Eq. (8), as a necessary condition for a circuit to output a Bernoulli-distributed random pulse train (RPT) with a given probability. The paper claims, on the basis of EBC, that deterministic circuits for the half-sum, division, and subtraction are impossible, while also presenting deterministic circuits DIV3 and SUB3 that compute these functions with low output entropy. Experimental measurements with 8e7 clock intervals per point and matching C simulations compare the circuits' precision and output relative entropy, and a cascade with a squaring circuit (Fig. 23) is used to study how output entropy affects downstream precision.

Significance. The experimental work is extensive and careful: each transfer-function point uses 8e7 clock intervals, the stated statistical error is 0.00011, and C simulations agree with measurements. The entropy-budget inequality itself is a correct application of Shannon entropy bounds and is properly attributed to Cover and Thomas. If the central claims held, the paper would make a useful contribution by showing that output entropy, not just average pulse rate, matters for cascaded stochastic circuits. However, the main theoretical conclusion is conditional on the definitional choice that a valid RPT must be an i.i.d. Bernoulli process; the paper's own deterministic DIV3 and SUB3, which compute the arithmetic functions correctly but with low relative entropy, directly contradict the impossibility statements as written. The Section 5 error measurements also contain an apparent inconsistency that undermines the general claim that higher output entropy reduces downstream error.

major comments (3)
  1. [Section 3.3, Eq. (8), Fig. 12-15] The statement 'a deterministic circuit for division is not possible' is contradicted by the circuit DIV3 presented in the same section. DIV3 is deterministic, has no internal entropy source, and its transfer function and errors (Fig. 13) show that it computes the clipped division with better precision than DIV1 and DIV2. The text attempts to reconcile this by saying DIV3 'cannot work correctly' and then noting that its output has low relative entropy, but the circuit clearly does work correctly in the sense of computing the intended arithmetic function. The EBC in Eq. (8) is a criterion for whether a circuit can produce a Bernoulli-distributed output with the required probability, not for whether it can compute the function. The impossibility conclusion should be rephrased as 'a deterministic circuit cannot produce a maximum-entropy (Bernoulli) output for division,' and the paper should explicitly acknowledge that rate-correct deterministic representations exist.
  2. [Section 3.2, half-sum argument] The claim that a deterministic half-sum circuit is impossible relies on the assertion that the operation is symmetric and therefore 'the only way to arrive to the half-sum symmetrically, is to select pulses from either input with equal probability,' and that this selection must be random, costing entropy of 1. This is an assertion, not a proof. Counter-based deterministic circuits such as DIV3 or SUB3 achieve symmetric operations without random selection, and a similar counter-based or stateful circuit could plausibly output a pulse train with average rate (p0+p1)/2. The argument needs to state precisely what class of circuits it excludes (e.g., memoryless Boolean gates) and prove the impossibility for that class, rather than relying on an unexplained 'only way' claim.
  3. [Section 5, Figs. 24c,d] The text states that for the second type of error, |p_y - p_z^2|, 'circuits DIV1 and SUB1 yield 1-2 orders smaller error than the other two circuits, in any region.' If this is correct, it directly contradicts the paper's thesis that higher output entropy (DIV2 and SUB2 have higher relative entropy per Figs. 15 and 21) reduces the error made by the downstream squaring circuit. If the statement is a typo and the opposite is true, it must be corrected, because the current wording makes the Section 5 conclusion internally inconsistent. As written, the reader cannot tell whether the data support or undermine the central claim that non-maximal output entropy causes error in subsequent calculations.
minor comments (5)
  1. [Eq. (5)] The relative entropy H_rel(x) = H(x)/H1(x) is undefined when H1(x) = 0, i.e., when p = 0 or p = 1. The authors should state the limiting convention used for these boundary cases.
  2. [Section 2.1] There are several typographical inconsistencies in terminology: 'RTP' is used in Section 2.2.1 where 'RPT' is meant, and 'PRC' appears in Section 2.1 where 'RPC' is intended. These should be corrected throughout.
  3. [Section 4, Eq. (17)] The approximate comparator transfer function in Eq. (17) is described as heuristic, but the paper does not report how the coefficient 9/8 was obtained, how many free parameters were fitted, or what the goodness of fit was. A brief statement of the fitting procedure and residuals would strengthen this part.
  4. [Section 2.1] The algorithm for generating a time-discrete RPT from the single-photon detector is described twice with slightly different wording ('if and only if one or more pulses have been received during the previous time segment' vs. 'during the previous time segments'). The duplication is confusing and should be merged or clarified.
  5. [References] Reference [24] is missing page numbers and the journal volume; only the DOI is given. The authors should complete the bibliographic details.

Circularity Check

4 steps flagged · score 6.0 of 10

EBC impossibility claims and the downstream-precision conclusion reduce to the paper's Bernoulli-output definition; DIV3/SUB3 show the arithmetic works without maximal entropy.

  1. self definitional [Section 2.2.2, Eq. (8); applied in Section 3.2]
    "Let us now consider an arbitrary pulse probability function 𝑝𝑧(𝒑) where 𝒑 = (𝑝0,… ,𝑝𝑛−1) is a point in 𝑛-dimensional space of probabilities associated with input RPTs 𝒙0,… ,𝒙𝑛−1 and ask whether a circuit that would execute it and output a perfectly random RPT can exist."

    The EBC is applied as if performing the function p_z(p) requires the output to be a perfectly random, maximal-entropy Bernoulli RPT with probability p_z. But a deterministic circuit could output a sequence with the correct long-run pulse rate and lower entropy, as DIV3 later demonstrates. Therefore the conclusion in Section 3.2 that a deterministic half-sum circuit is impossible, and the parallel division impossibility, are not consequences of the entropy inequality alone; they are consequences of demanding Bernoulli-distributed output, which is exactly the assumption already built into Eq. (8).

  2. self definitional [Section 3.3, DIV3, Figs. 12–15]
    "DIV3 is a deterministic division circuit. In our entropy budget analysis, illustrated in Fig. 8, we have proven that such a circuit cannot work correctly. Indeed, since it either passes high frequency pulses from CLK or blocks them, DIV3 tends to generate long bursts of consecutive pulses followed by long periods of absence of pulses ... This type of output has a low relative entropy."

    The paper first proves from EBC that a deterministic division circuit cannot work, then presents DIV3, a deterministic circuit whose measured transfer function and errors in Fig. 13 show that it does compute the clipped division p0/p1 with good precision. The reconciliation merely identifies DIV3's output as bursty, i.e., of low relative entropy. Thus 'cannot work correctly' means 'does not output a Bernoulli RPT', not 'does not compute the arithmetic function'. The impossibility result reduces by construction to the paper's definition that a valid RPC output must be an independent Binomial process.

2 more flagged steps
  1. self definitional [Section 5, squaring circuit, Figs. 23–24]
    "If the squaring circuit is fed by a maximum-entropy input, this type of error would be zero, from which we conclude that any squaring error is a consequence of the input having a non-maximum entropy."

    The squaring circuit is defined as ANDing an RPT with its one-clock delayed copy, so its expected output equals p_z^2 only when successive bits are independent Bernoulli trials. Any correlated input makes E[x_i x_{i-1}] differ from p_z^2 by construction. Since the paper defines non-maximum entropy via Eq. (5) as the presence of such dependence, the statement that non-maximum entropy causes squaring error restates the circuit's independence assumption. The measured error differences between DIV2/SUB2 and DIV1/SUB1 are real data, but the causal claim that entropy itself is the cause is definitional for this circuit.

  2. self definitional [Conclusions and discussion]
    "Using EBC we find that 𝑛-ary multiplication can be done with a deterministic circuit (an 𝑛-input AND gate), but the other three elementary arithmetic operations, namely: binary addition-divided-by-two, subtraction and division, cannot be accomplished by deterministic circuits."

    This conclusion is only true if 'accomplished' silently means 'while outputting a Bernoulli RPT of maximal entropy'. The paper itself states in Section 3.4 that EBC holds for subtraction and therefore a deterministic subtractor is not forbidden, and then presents SUB3 as a deterministic subtraction circuit. DIV3 is likewise a deterministic divider. The conclusion ignores these counterexamples, or equivalently builds the Bernoulli-output requirement into the word 'accomplished', making the headline result circular rather than a derived property of the arithmetic operations.

full rationale

The entropy inequality in Eq. (7) is standard and is cited to Cover and Thomas, so its derivation is not circular. The circularity enters when Eq. (8) is used to rule out whole arithmetic functions: the left side H(p_z(p)) is treated as the required output entropy, which is only true if every valid RPC output must be a maximal-entropy Bernoulli RPT with probability p_z. The paper's own deterministic circuits DIV3 and SUB3 satisfy the rate-level definition of the arithmetic operations while having low relative entropy, so the claimed impossibilities reduce to the Bernoulli-output definition. The same reduction appears in the Section 5 argument that non-maximal entropy causes squaring error, because the squaring circuit's transfer function is defined by an independence assumption between the current bit and the delayed bit. The empirical measurements comparing DIV2/SUB2 with DIV1/SUB1 are genuine and not fitted, and the self-citations to RFF, RFLL, and related hardware are components with independent prior descriptions, not load-bearing evidence for the entropy argument. Nevertheless, the central impossibility and precision conclusions are partially circular: they are true by the paper's own definition of a valid RPT, not by an independent derivation. Score 6 reflects this partial circularity.

Assumptions & free parameters 1 free parameters · 6 assumptions · 0 invented entities

No free parameters are fitted to support the central entropy-precision claim. The comparator slope coefficient is a minor heuristic fit. The axioms are mostly standard information theory plus the domain assumption that numbers in RPC must be encoded as Bernoulli pulse trains. No new physical entities are introduced.

free parameters (1)
  • Comparator slope coefficient k in Eq. (17) = k = (9/8) * 2^(N+1)
    The logistic approximation to the comparator transfer function is found heuristically from the measured slope of 9/16 * 2^N at p0 = p1. It is a descriptive fit, not central to the main entropy-precision claim.
assumptions (6)
  • standard math Independence entropy bound: H(X0,...,Xn-1,Xcirc) <= H(Xcirc) + sum_i H(Xi)
    Used to derive the entropy budget criterion in Eq. (6)-(8); cited from Cover and Thomas.
  • domain assumption For valid RPC operation, all pulse trains must be mutually independent random binomial variates
    Stated in Section 1 as the 'crucial assumption'; it implies that a number is represented by a memoryless Bernoulli process, not merely by its average pulse rate.
  • domain assumption The entropy of an RPT with pulse probability p equals H(p)
    Used in the EBC examples (Section 3.2, Figs. 7 and 8) where output entropy is taken as H(p_z); this is only exact for maximal-entropy Bernoulli sequences.
  • domain assumption The photoelectric effect provides fundamentally unpredictable pulse timing
    Basis for claiming the random flip-flop is a true entropy source; supported by prior literature including the authors' own device papers.
  • domain assumption FPGA circuits are free of race conditions and metastability
    Section 2.1 says techniques to avoid these are well known and does not model them; the measured results assume hazard-free operation.
  • domain assumption N-bit counters saturate at 0 and 2^N - 1 without rollover
    Explicitly assumed in Section 3.3 before presenting DIV1; this saturation behavior is needed for the dividers and subtractors to function as described.

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Cite this review

Pith. "Pith review of Improved circuits for a biologically-inspired random pulse computer." pith.science (2026). https://pith.science/paper/HPQOGDQD

@misc{pith2026190804779,
  author       = {Pith},
  title        = {Pith review of: Improved circuits for a biologically-inspired random pulse computer},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/HPQOGDQD}},
  note         = {Machine review of arXiv:1908.04779}
}
read the original abstract

We present improved circuits intended for building a universal computer based on Random Pulse Computing (RPC) paradigm, a biologically-inspired way of computation in which variable is represented by a frequency of a Random Pulse Train (RPT) rather than a logic state. The RPC we mention here is also known as "stochastic unipolar computation" in newer literature. Unlike in previous art, where randomness is obtained from electronics noise or a pseudorandom shift register while processing circuitry is deterministic, in our approach both variable generation and signal processing rely on the random flip-flop (RFF) whose randomness is derived from a fundamentally random quantum process. This offers advantage in better precision and faster calculation.

Figures

Figures reproduced from arXiv: 1908.04779 by the authors.

Figure 1
Figure 1. Random pulse train in which each pulse corresponds to a Poissonian random event with frequency 1/ 𝑡𝑖 (a); Time-discrete RPT wherein appearance of a pulse in a given time segment of width ∆𝑡 is an independent binomial random event with probability 𝑝 (b); one full cycle of a biological nerve pulse in mammalians that lasts about 5 ms (c). The RPC computer can perform complex calculations through a series of interconnec… view at source ↗
Figure 3
Figure 3. A random flip-flop (RFF) realized partly in the FPGA: T and CP are its inputs, Q and Q are its outputs, while PD is an "internal" input (not shown in the symbol) that receives about 16 Mcps random pulses from a photon detector, situated outside of the FPGA and illuminated by a constant intensity light from an LED. Symbol of a T-type RFF is shown on the right end. Finally, an essential tool in our methods is a set of… view at source ↗
Figure 4
Figure 4. Possible entropy sources in a RPC circuit, available for generation of the output RPT 𝒙𝑧 : the input RPTs 𝒙0, … , 𝒙𝑛−1 , and any internal entropy source(s) 𝒙circ . The Independence entropy bound theorem (see e.g. Eq. (2.96) in [14]) states that the total available entropy is less than or equal to the sum of input entropies: 𝐻 𝒙0 , … , 𝒙𝑛−1 , 𝒙circ ≤ 𝒙circ + 𝐻 𝒙𝑖 [PITH_FULL_IMAGE:figures/full_fig_p006_4.png] view at source ↗

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