ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits | Paper Citation Record

Observation 3fbe0bab-1741-4e0d-bb44-c16cd3c93a47 · outbound

This paper cites Scaling Laws for Neural Language Models.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Scaling Laws for Neural Language Models

Reference 1

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This paper cites 1.1 computing’s energy problem (and what we can do about it),.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits 1.1 computing’s energy problem (and what we can do about it),

Reference 2

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ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits In-memory computing: Advances and prospects,

Reference 3

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ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Analog or digital in-memory computing? benchmarking through quantitative modeling,

Reference 4

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This paper cites A 64-tile 2.4- mb in-memory-computing cnn accelerator employing charge-domain compute,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A 64-tile 2.4- mb in-memory-computing cnn accelerator employing charge-domain compute,

Reference 5

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This paper cites Macc-sram: A multistep accumu- lation capacitor-coupling in-memory computing sram macro for deep convolutional neural networks,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Macc-sram: A multistep accumu- lation capacitor-coupling in-memory computing sram macro for deep convolutional neural networks,

Reference 6

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This paper cites A 28-nm 50.1-tops/w p-8t sram compute- in-memory macro design with bl charge-sharing-based in-sram dac/adc operations,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A 28-nm 50.1-tops/w p-8t sram compute- in-memory macro design with bl charge-sharing-based in-sram dac/adc operations,

Reference 7

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This paper cites Pimca: A programmable in-memory computing accelerator for energy-efficient dnn inference,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Pimca: A programmable in-memory computing accelerator for energy-efficient dnn inference,

Reference 8

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ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A 4-bit mixed-signal mac macro with one-shot adc conversion,

Reference 9

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Observation 81d13587-cfc5-47d8-a09a-53a4e14ff82b · outbound

This paper cites Pico-ram: A pvt-insensitive analog compute- in-memory sram macro with in situ multi-bit charge computing and 6t thin-cell-compatible layout,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Pico-ram: A pvt-insensitive analog compute- in-memory sram macro with in situ multi-bit charge computing and 6t thin-cell-compatible layout,

Reference 10

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This paper cites 15.1 a programmable neural-network inference accelerator based on scalable in-memory computing,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits 15.1 a programmable neural-network inference accelerator based on scalable in-memory computing,

Reference 11

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This paper cites C3sram: An in-memory- computing sram macro based on robust capacitive coupling computing mechanism,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits C3sram: An in-memory- computing sram macro based on robust capacitive coupling computing mechanism,

Reference 12

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This paper cites A fully bit- flexible computation in memory macro using multi-functional computing bit cell and embedded input sparsity sensing,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A fully bit- flexible computation in memory macro using multi-functional computing bit cell and embedded input sparsity sensing,

Reference 13

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Observation 38ad8520-3d44-4552-97ee-358c29130d9b · outbound

This paper cites Neurosim: A circuit-level macro model for benchmarking neuro-inspired architectures in online learning,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Neurosim: A circuit-level macro model for benchmarking neuro-inspired architectures in online learning,

Reference 14

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Observation 62b43489-9523-4e2a-b5f6-81512d822c3b · outbound

This paper cites Syscim: Systemc-ams simulation of memristive computation in-memory,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Syscim: Systemc-ams simulation of memristive computation in-memory,

Reference 15

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Observation f9f162e7-3419-4b2a-85b2-fdce21a44e41 · outbound

This paper cites Pimsim-nn: An isa-based simulation framework for processing-in-memory accelerators,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Pimsim-nn: An isa-based simulation framework for processing-in-memory accelerators,

Reference 16

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Observation 9a7f7693-a210-4808-9a62-f4487f0b885d · outbound

This paper cites A flexible and fast pytorch toolkit for simulating training and inference on analog crossbar arrays,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A flexible and fast pytorch toolkit for simulating training and inference on analog crossbar arrays,

Reference 17

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This paper cites Memtorch: An open-source simulation framework for memristive deep learning systems,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Memtorch: An open-source simulation framework for memristive deep learning systems,

Reference 18

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Observation c82c0365-0fa9-41d2-9b15-618e2b01ac85 · outbound

This paper cites ef2lowsim: System-level simulator of eflash-based compute-in-memory accelerators for convolu- tional neural networks,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits ef2lowsim: System-level simulator of eflash-based compute-in-memory accelerators for convolu- tional neural networks,

Reference 19

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Observation afc174d4-1390-4d45-b6a7-a3ed93d8bd3a · outbound

This paper cites A user-friendly fast and accurate simulation framework for non-ideal factors in computing-in-memory architecture,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A user-friendly fast and accurate simulation framework for non-ideal factors in computing-in-memory architecture,

Reference 20

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This paper cites X-pim: Fast modeling and validation framework for mixed-signal processing-in-memory using compressed equivalent model in system verilog,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits X-pim: Fast modeling and validation framework for mixed-signal processing-in-memory using compressed equivalent model in system verilog,

Reference 21

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ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Deep in-memory architectures for machine learning–accuracy versus efficiency trade- offs,

Reference 22

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Observation 2c4fdebb-278c-4937-89ba-591e330b7462 · outbound

This paper cites Fun- damental limits on the precision of in-memory architectures,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Fun- damental limits on the precision of in-memory architectures,

Reference 23

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Observation 21fbd90d-b849-4d6f-b611-58ef49a9ad5b · outbound

This paper cites A programmable heterogeneous microprocessor based on bit-scalable in-memory comput- ing,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A programmable heterogeneous microprocessor based on bit-scalable in-memory comput- ing,

Reference 24

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Observation 8380e860-1eb0-4c47-8eed-eada9cc88210 · outbound

This paper cites A 818–4094 tops/w capacitor-reconfigured analog cim for unified acceleration of cnns and transformers,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A 818–4094 tops/w capacitor-reconfigured analog cim for unified acceleration of cnns and transformers,

Reference 25

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Observation b1f577d0-df31-4205-afd8-baf616d876b5 · outbound

This paper cites Noise modeling and analysis of sar adcs,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Noise modeling and analysis of sar adcs,

Reference 26

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Observation e63e13bb-7ac9-49eb-817d-6e89c8f23d7e · outbound

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ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Simulation and analysis of random decision errors in clocked comparators,

Reference 27

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Observation 569e04c7-901e-4484-9c39-805c2b2e2897 · outbound

This paper cites Mismatch characterization of small metal fringe capacitors,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Mismatch characterization of small metal fringe capacitors,

Reference 28

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Observation fcf4610a-e5a9-44a4-bbd1-7a4d086cd1ec · outbound

This paper cites Modeling and optimization of sram-based in-memory computing hardware design,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Modeling and optimization of sram-based in-memory computing hardware design,

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.835464Z

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Observation 1dfd9155-b4f5-4a59-96c9-b6860d5b75d4 · outbound

This paper cites 34.5 a 818-4094tops/w capacitor-reconfigured cim macro for unified acceleration of cnns and transformers,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits 34.5 a 818-4094tops/w capacitor-reconfigured cim macro for unified acceleration of cnns and transformers,

Reference 30

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.823842Z

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Observation 57ffb122-22c5-4047-b88a-ae21263b9012 · outbound

This paper cites Dnn+neurosim: An end- to-end benchmarking framework for compute-in-memory accelerators with versatile device technologies,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Dnn+neurosim: An end- to-end benchmarking framework for compute-in-memory accelerators with versatile device technologies,

Reference 31

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Observation b528c6b8-7501-4331-9fa6-60511625591e · outbound

This paper cites A White Paper on Neural Network Quantization.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A White Paper on Neural Network Quantization

Reference 32

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Observation b5ade5ee-220d-4afe-b2ba-17295410a2de · outbound

This paper cites Low-cost 7t-sram compute-in-memory design based on bit-line charge-sharing based analog-to-digital conver- sion,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Low-cost 7t-sram compute-in-memory design based on bit-line charge-sharing based analog-to-digital conver- sion,

Reference 33

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Observation c40f9115-53c2-429d-8db5-acb26df7374e · outbound

This paper cites Understanding and Overcoming the Challenges of Efficient Transformer Quantization.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Understanding and Overcoming the Challenges of Efficient Transformer Quantization

Reference 34

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Observation 3ad48fa3-9553-47ef-ab19-1fb895af0284 · outbound

This paper cites Pacim: A sparsity-centric hybrid compute-in-memory architecture via probabilistic approximation,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Pacim: A sparsity-centric hybrid compute-in-memory architecture via probabilistic approximation,

Reference 35

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.736160Z

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Observation 75a0f058-9352-4844-a355-e9304a288f18 · outbound

This paper cites Hybrid analog-digital in- memory computing,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Hybrid analog-digital in- memory computing,

Reference 36

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.618498Z

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Observation 848c3888-65a7-47c3-adb9-8953c19d7e0e · outbound

This paper cites A 22nm 832kb hybrid-domain floating-point sram in-memory-compute macro with 16.2-70.2tflops/w for high-accuracy ai-edge devices,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A 22nm 832kb hybrid-domain floating-point sram in-memory-compute macro with 16.2-70.2tflops/w for high-accuracy ai-edge devices,

Reference 37

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Observation bd7a02c7-2cd3-4c4f-82a8-88ddd17c8300 · outbound

This paper cites Osa-hcim: On-the-fly saliency-aware hybrid sram cim with dy- namic precision configuration,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Osa-hcim: On-the-fly saliency-aware hybrid sram cim with dy- namic precision configuration,

Reference 38

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.594065Z

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Observation 7d059c1d-37fa-4e61-9acb-54192e3cf83c · outbound

This paper cites Oversampling adc: A review of recent design trends,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Oversampling adc: A review of recent design trends,

Reference 39

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.579618Z

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Observation cc7ca5c9-b90d-494c-a443-0f29d19c9e19 · outbound

This paper cites A 28-nm 0.8m-weights/mm2 9.1-tops/mm2 sram-based all-analog compute-in-memory using fine-grained structured pruning with adaptive-ranging adc,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A 28-nm 0.8m-weights/mm2 9.1-tops/mm2 sram-based all-analog compute-in-memory using fine-grained structured pruning with adaptive-ranging adc,

Reference 40

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.461023Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 4396f354-c9c2-4741-af5f-0a70ed103d81 · outbound

This paper cites A switched-capacitor sram in-memory computing macro with high-precision, high-efficiency differential ar- chitecture,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits A switched-capacitor sram in-memory computing macro with high-precision, high-efficiency differential ar- chitecture,

Reference 41

Resolution: unresolved; no resolver link, observed 2026-08-12T19:08:28.766055Z

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Observation 00603778-41eb-4dc7-aac6-b702dffe7a64 · outbound

This paper cites 14.6 a 28nm 64kb bit- rotated hybrid-cim macro with an embedded sign-bit-processing array and a multi-bit-fusion dual-granularity cooperative quantizer,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits 14.6 a 28nm 64kb bit- rotated hybrid-cim macro with an embedded sign-bit-processing array and a multi-bit-fusion dual-granularity cooperative quantizer,

Reference 42

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.278380Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 262b5849-7d1d-40d6-a784-187381cf9bb1 · outbound

This paper cites 16.4 an 89tops/w and 16.3tops/mm2 all-digital sram-based full-precision compute-in memory macro in 22nm for machine-learning edge applications,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits 16.4 an 89tops/w and 16.3tops/mm2 all-digital sram-based full-precision compute-in memory macro in 22nm for machine-learning edge applications,

Reference 43

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:29.066772Z

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Observation afa2c1e2-9832-4d07-8a46-9c9299ce388b · outbound

This paper cites Dimc: 2219tops/w 2569f2/b digital in-memory computing macro in 28nm based on approximate arithmetic hardware,.

ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits Dimc: 2219tops/w 2569f2/b digital in-memory computing macro in 28nm based on approximate arithmetic hardware,

Reference 44

Resolution: verified fuzzy; raw_fallback, observed 2026-08-12T19:08:28.986135Z

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