Paper Citation Record · LEDGER

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V

As of 22 August 2026, this Paper Citation Record lists 23 of 23 outbound references and 0 inbound Pith citation observations for arXiv:2508.20653.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2508.20653 v1

Coverage vector

measured 23 of 23 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-05T14:58:41.191226Z

measured 23 of 23 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-22T06:32:14.747728+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

23 of 23 outbound references displayed

verified exact0
verified fuzzy23
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 509c9db3-e74d-4f41-8643-f1e5651a9340 · outbound

This paper cites Breakthrough aes performance with intel aes new instructions,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Breakthrough aes performance with intel aes new instructions,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:48.733100Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation baaf82c4-5f04-4b21-be63-df39009df320 · outbound

This paper cites Armv8-a cryptographic extension,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Armv8-a cryptographic extension,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:48.510401Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 9baacf33-c092-4421-a504-cb319f2710f4 · outbound

This paper cites Lessons learned from designing a 65nm asic for evaluating third round sha-3 candidates,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Lessons learned from designing a 65nm asic for evaluating third round sha-3 candidates,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:48.218418Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 1e941771-4f6e-4e37-b90a-1bebc6ee769f · outbound

This paper cites Sha2 and sha-3 accelerator design in a 7 nm technology within the european processor initiative,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Sha2 and sha-3 accelerator design in a 7 nm technology within the european processor initiative,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:47.888535Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation dd6bd60c-29a1-4b95-84d7-8309cd8d7119 · outbound

This paper cites Prototyping platform for performance evaluation of sha-3 candidates,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Prototyping platform for performance evaluation of sha-3 candidates,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:45.704486Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation ad4f8abe-83d8-4a4e-b13f-2dbbffe82776 · outbound

This paper cites Comparing hardware performance of round 3 sha-3 candidates using multiple hardware architectures in xilinx and altera fpgas,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Comparing hardware performance of round 3 sha-3 candidates using multiple hardware architectures in xilinx and altera fpgas,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:45.467220Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 8b4167d4-620d-43db-bd07-2a620d3f1cac · outbound

This paper cites A sha-3 co-processor for iot applications,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V A sha-3 co-processor for iot applications,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:45.177884Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation ac054e43-5a73-4ed6-b3b5-fccf374a2cf3 · outbound

This paper cites Design exploration of sha-3 asip for iot on a 32-bit risc-v processor,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Design exploration of sha-3 asip for iot on a 32-bit risc-v processor,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:44.915840Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation d9252da9-9b90-40fd-bfc6-ccd9f79c9d36 · outbound

This paper cites Maximizing the potential of custom risc-v vector extensions for speeding up sha-3 hash functions,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Maximizing the potential of custom risc-v vector extensions for speeding up sha-3 hash functions,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:44.653338Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 2ef0772a-0c56-41de-b93f-e74ac4370bf2 · outbound

This paper cites Enhancing the hardware pipelining optimization technique of the sha-3 via fpga,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Enhancing the hardware pipelining optimization technique of the sha-3 via fpga,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:44.438017Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 4b5a317a-aa23-475a-877a-9ec3499f6e8b · outbound

This paper cites Investigation of communication overhead of soc lookaside accelerators,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Investigation of communication overhead of soc lookaside accelerators,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:44.203885Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 14040cf1-2bb1-4b99-8594-2abcc8e0fa65 · outbound

This paper cites Implementation of the sha-3 family us- ing avx512 instructions,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Implementation of the sha-3 family us- ing avx512 instructions,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:43.957692Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 63948008-0b86-4f0a-8ac3-793097621304 · outbound

This paper cites Vector instruction set extensions for efficient computation of keccak,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Vector instruction set extensions for efficient computation of keccak,

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:43.661982Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 0626baaf-f3c7-418d-91fb-b723bb1ec0e4 · outbound

This paper cites Fair and com- prehensive performance evaluation of 14 second round sha-3 asic im- plementations,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Fair and com- prehensive performance evaluation of 14 second round sha-3 asic im- plementations,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:43.443713Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 4cf70188-cecf-4a33-b48e-a7e5a2efdfec · outbound

This paper cites Fpga implementations of the round two sha-3 candidates,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Fpga implementations of the round two sha-3 candidates,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:43.158093Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 16702d21-35ed-4cbd-b25a-4ecbf7d5dd82 · outbound

This paper cites High performance pipelined fpga implementation of the sha-3 hash algorithm,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V High performance pipelined fpga implementation of the sha-3 hash algorithm,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:42.896472Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 0e2cec78-a055-41a5-b567-acec15bbfd98 · outbound

This paper cites Risc-v cryptography extensions standardisation work,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Risc-v cryptography extensions standardisation work,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:42.653536Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 56949bb9-3086-4656-be64-f463773f5936 · outbound

This paper cites Keccakcodepackage,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Keccakcodepackage,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:42.430429Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation ea89062e-fe47-44fc-be3a-3cd3ba931081 · outbound

This paper cites Cryptographic algorithm validation program: Secure hashing,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Cryptographic algorithm validation program: Secure hashing,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:42.178372Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation b9e7e42b-ae04-4d0d-8eef-16a17dc72c6e · outbound

This paper cites The cost of application-class processing: Energy and performance analysis of a linux-ready 1.7-ghz 64-bit risc- v core in 22-nm fdsoi technology,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V The cost of application-class processing: Energy and performance analysis of a linux-ready 1.7-ghz 64-bit risc- v core in 22-nm fdsoi technology,

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:41.929880Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 6823f6f5-d3ed-40c6-973d-12af2a7165f6 · outbound

This paper cites Risc-v tests,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Risc-v tests,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:41.731727Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 3762fa4d-da6e-4d5e-94ea-c7bb2ad1a63e · outbound

This paper cites Mibench: A free, commercially represen- tative embedded benchmark suite,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Mibench: A free, commercially represen- tative embedded benchmark suite,

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:41.509725Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Observation 564d1707-f229-4f96-a113-234a2529297d · outbound

This paper cites Cva6 v5.3.0,.

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V Cva6 v5.3.0,

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-08-05T14:58:41.302806Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.

Pith citing papers

No inbound Pith citation observations are available.