Paper Citation Record · LEDGER

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors

As of 8 August 2026, this Paper Citation Record lists 36 of 36 outbound references and 0 inbound Pith citation observations for arXiv:2506.06817.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2506.06817 v1

Coverage vector

measured 36 of 36 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-07T05:54:31.736128Z

measured 36 of 36 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-07T06:34:17.273281+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

36 of 36 outbound references displayed

verified exact0
verified fuzzy29
unresolved6
parse uncertain0
malformed identifier0
metadata mismatch1

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 025a6956-e960-4840-b430-65fbb46038c2 · outbound

This paper cites Soft-core processors for embedded systems,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Soft-core processors for embedded systems,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.335199Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 8fa1d02e-7604-49ac-b5c1-784b96e1b750 · outbound

This paper cites Dealing with categorical and integer-valued variables in Bayesian Optimization with Gaussian processes,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Dealing with categorical and integer-valued variables in Bayesian Optimization with Gaussian processes,

Reference 2

Resolution: unresolved; no resolver link, observed 2026-08-07T05:54:31.595955Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation eeaee6f0-8bc8-493a-8bde-8070512db62b · outbound

This paper cites BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration,

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-07T05:54:31.600318Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4e723f3c-9903-4ed1-a453-f827d23c5e1c · outbound

This paper cites Boomerang: Physical-Aware De- sign Space Exploration Framework on RISC-V SonicBOOM Microar- chitecture,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Boomerang: Physical-Aware De- sign Space Exploration Framework on RISC-V SonicBOOM Microar- chitecture,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.321924Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 093a2fe3-5332-4e63-bc03-c70e60b048ca · outbound

This paper cites Taking the human out of the loop: A review of Bayesian optimization,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Taking the human out of the loop: A review of Bayesian optimization,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.308449Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 5e423064-4963-400c-857c-d1c144d88fae · outbound

This paper cites an unresolved cited work.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Unresolved cited work

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-07T05:54:31.613713Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation db419efa-ad8c-487b-af64-36f47f07c598 · outbound

This paper cites FIST: A feature-importance sampling and tree-based method for automatic design flow parameter tuning,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors FIST: A feature-importance sampling and tree-based method for automatic design flow parameter tuning,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.287111Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 2b8742db-05dc-4471-9bbb-b741b8da794f · outbound

This paper cites Exploring machine learning adoption in customisable processor design,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Exploring machine learning adoption in customisable processor design,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.274484Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 752c403b-1fc9-4fbc-97c0-bcf7aa91bede · outbound

This paper cites Is Vanilla Bayesian Optimization Enough for High-Dimensional Architec- ture Design Optimization?.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Is Vanilla Bayesian Optimization Enough for High-Dimensional Architec- ture Design Optimization?

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.261975Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 742571bc-2bae-4d75-95b9-06711f7e7fdb · outbound

This paper cites Resource-Constraint Bayesian Optimiza- tion for Soft Processors on FPGAs,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Resource-Constraint Bayesian Optimiza- tion for Soft Processors on FPGAs,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.248612Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 692a6419-a938-4f5a-a5d8-1a82dba2339a · outbound

This paper cites AMG: Automated Efficient Ap- proximate Multiplier Generator for FPGAs via Bayesian Optimization,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors AMG: Automated Efficient Ap- proximate Multiplier Generator for FPGAs via Bayesian Optimization,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.236126Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 3b44525a-a080-454b-89ee-b42d89ecdf28 · outbound

This paper cites Layer-Specific Optimization for Mixed Data Flow With Mixed Precision in FPGA Design for CNN- Based Object Detectors,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Layer-Specific Optimization for Mixed Data Flow With Mixed Precision in FPGA Design for CNN- Based Object Detectors,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.223852Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation fc842d7a-42b0-443e-999c-2f017babee7a · outbound

This paper cites Graebo: Fpga general routing architecture exploration via Bayesian optimization,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Graebo: Fpga general routing architecture exploration via Bayesian optimization,

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.210673Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 04c2b63f-6778-481e-a6af-02d80a3e73c4 · outbound

This paper cites Multi-objective design space exploration for high-level synthesis via Bayesian optimization,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Multi-objective design space exploration for high-level synthesis via Bayesian optimization,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.197427Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 9eeb6ed5-e7bf-49ed-ae05-8dabb4f0cdf1 · outbound

This paper cites Hgbo-dse: Hierarchical gnn and Bayesian optimization based hls design space exploration,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Hgbo-dse: Hierarchical gnn and Bayesian optimization based hls design space exploration,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.184362Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 84ca6b91-d4ed-4d9c-91a5-10b250dfd4a7 · outbound

This paper cites A Tutorial on Bayesian Optimization of Expensive Cost Functions, with Application to Active User Modeling and Hierarchical Reinforcement Learning.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors A Tutorial on Bayesian Optimization of Expensive Cost Functions, with Application to Active User Modeling and Hierarchical Reinforcement Learning

Reference 16

Resolution: unresolved; no resolver link, observed 2026-08-07T05:54:31.654031Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 96fff061-c53f-43b2-b54a-a92f91f7909e · outbound

This paper cites A software package for sequential quadratic programming,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors A software package for sequential quadratic programming,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.171601Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation c3fdcb4a-da2e-4c74-a2f8-28d93a60787f · outbound

This paper cites An Interior Point Algorithm for Large-Scale Nonlinear Programming,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors An Interior Point Algorithm for Large-Scale Nonlinear Programming,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.158577Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 6dbe5375-708d-4ffa-b86c-24e38c0379d5 · outbound

This paper cites Taking the Human Out of the Loop: A Review of Bayesian Optimiza- tion,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Taking the Human Out of the Loop: A Review of Bayesian Optimiza- tion,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.145415Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 888d0f8b-b9d5-4ff0-bd4a-18673a4a244e · outbound

This paper cites Towards agile DNN accelerator design using incremental synthesis on fpgas,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Towards agile DNN accelerator design using incremental synthesis on fpgas,

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-07T05:54:31.670451Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6428d566-ec63-48c5-a5d2-b992ff345f5f · outbound

This paper cites Efficient design space exploration via statistical sampling and AdaBoost learning,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Efficient design space exploration via statistical sampling and AdaBoost learning,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.132506Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation c85c2834-3268-4029-b0a2-a25fe6d63a9a · outbound

This paper cites Cost-aware Bayesian Optimization.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Cost-aware Bayesian Optimization

Reference 22

Resolution: unresolved; no resolver link, observed 2026-08-07T05:54:31.678306Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation c2c21411-9417-4fb6-b7ee-7283c379ae4d · outbound

This paper cites Exploring coremark a benchmark maximizing simplicity and efficacy,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Exploring coremark a benchmark maximizing simplicity and efficacy,

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.119376Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 0f62c590-aa5b-4d73-97e3-1324dd4a1534 · outbound

This paper cites Dhrystone: a synthetic systems programming benchmark,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Dhrystone: a synthetic systems programming benchmark,

Reference 24

Resolution: metadata mismatch; raw_fallback, observed 2026-08-07T05:54:31.846608Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation f518d967-e757-4ec5-b536-8f1a5b5b2930 · outbound

This paper cites riscv-software-src/riscv-tests risc-v,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors riscv-software-src/riscv-tests risc-v,

Reference 25

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.106284Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 51b3a8fc-1566-4966-bbda-482b38d9d3d5 · outbound

This paper cites The Rocket Chip Generator,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors The Rocket Chip Generator,

Reference 26

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.093871Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 78889dda-8af3-4255-b5e9-6957799f94e2 · outbound

This paper cites The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameter- ized RISC-V Processor,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameter- ized RISC-V Processor,

Reference 27

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.081346Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation fd9e936c-0c34-4aea-b41b-f0e65dba5dd7 · outbound

This paper cites Cores-VeeR-EL2: A RISC-V Core,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Cores-VeeR-EL2: A RISC-V Core,

Reference 28

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.068006Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 5bf21236-dfbd-4ceb-af83-303164d0a827 · outbound

This paper cites Ibex: An embedded 32-bit risc-v cpu core,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Ibex: An embedded 32-bit risc-v cpu core,

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.055372Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 7cb09ff5-0662-4313-a983-5ace9a703c32 · outbound

This paper cites The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-Ready 1.7-GHz 64-Bit RISC-V Core in 22-nm FDSOI Technology,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-Ready 1.7-GHz 64-Bit RISC-V Core in 22-nm FDSOI Technology,

Reference 30

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.042107Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation c2915e88-2d84-4645-ac6c-16fdb3c377e2 · outbound

This paper cites Can hardware performance counters be trusted?.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Can hardware performance counters be trusted?

Reference 31

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.027843Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation b2234b0d-cad4-4b0e-9238-a3a67afd389b · outbound

This paper cites Automating Optimiza- tion of Reconfigurable Designs,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Automating Optimiza- tion of Reconfigurable Designs,

Reference 32

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:32.012975Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 510c32bb-5ca6-443a-8e65-56e6343163ad · outbound

This paper cites Gamma: Automating the HW mapping of DNN models on accelerators via genetic algorithm,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Gamma: Automating the HW mapping of DNN models on accelerators via genetic algorithm,

Reference 33

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:31.998440Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation e950939f-83ee-4c74-91d0-06b519345ed6 · outbound

This paper cites Extended ant colony optimization algorithm for power electronic circuit design,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Extended ant colony optimization algorithm for power electronic circuit design,

Reference 34

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:31.985324Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation 7a6ff4a2-1be9-4ad7-a746-f28ea3900610 · outbound

This paper cites Towards automated risc- v microarchitecture design with reinforcement learning,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Towards automated risc- v microarchitecture design with reinforcement learning,

Reference 35

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:31.971847Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Observation ae206edd-0c52-46b2-911c-2b496d2f213a · outbound

This paper cites Selection of the Register File Size and the Resource Allocation Policy on SMT Processors,.

ASPO: Constraint-Aware Bayesian Optimization for FPGA-based Soft Processors Selection of the Register File Size and the Resource Allocation Policy on SMT Processors,

Reference 36

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T05:54:31.957779Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.

Pith citing papers

No inbound Pith citation observations are available.