Side-gate leakage and field emission in all-graphene field effect transistors on SiO2/Si substrate
read the original abstract
We fabricate planar all-graphene field-effect transistors with self-aligned side-gates at 100 nm from the main graphene conductive channel, using a single lithographic step. We demonstrate side-gating below 1V with conductance modulation of 35% and transconductance up to 0.5 mS/mm at 10 mV drain bias. We measure the planar leakage along the SiO2/vacuum gate dielectric over a wide voltage range, reporting rapidly growing current above 15 V. We unveil the microscopic mechanisms driving the leakage, as Frenkel-Poole transport through SiO2 up to the activation of Fowler-Nordheim tunneling in vacuum, which becomes dominant at high voltages. We report a field-emission current density as high as 1uA/um between graphene flakes. These findings are essential for the miniaturization of atomically thin devices.
This paper has not been read by Pith yet.
discussion (0)
Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.