Not yet reviewed by Pith; the record is open.

Purpose: CMOS pixel sensors have become extremely attractive for future high performance tracking devices. Initial R\&D work has been conducted for the vertex detector for the proposed Circular Electron Positron Collider that will allow precision Higgs measurements. It is critical to achieve low power consumption to minimize the material budget. This requires careful optimization of the sensor diode geometry to reach high charge-over-capacitance that allows reduction in analog power consumption. Methods: The electrode area and footprint are two critical elements in sensor diode geometry and have deciding impacts on the sensor charge collection performance. Prototype CMOS pixel sensor JadePix-1 has been developed with pixel sectors implementing different electrode area and footprint and their charge collection performance has been characterized with radioactive resources. Results: Charge-to-voltage conversion gains are calibrated with low energy X-ray. Noise, charge collection efficiency, charge-over-capacitance and signal-to-noise ratio are obtained for pixel sectors of different electrode area and footprint. Conclusion: Small electrode area and large footprint are preferred to achieve high charge-over-capacitance that promises low analog power consumption. Ongoing studies on sensor performance before and after irradiation, combined with this work, will conclude on the diode geometry optimization.