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SOT-MRAM 300mm integration for low power and ultrafast embedded memories

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arxiv 1810.10356 v1 pith:KKEEZMAS submitted 2018-10-22 cond-mat.mes-hall cs.ETphysics.app-ph

SOT-MRAM 300mm integration for low power and ultrafast embedded memories

classification cond-mat.mes-hall cs.ETphysics.app-ph
keywords integrationpowertimearchitecturescmos-compatibledemonstratedevicesembedded
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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We demonstrate for the first time full-scale integration of top-pinned perpendicular MTJ on 300 mm wafer using CMOS-compatible processes for spin-orbit torque (SOT)-MRAM architectures. We show that 62 nm devices with a W-based SOT underlayer have very large endurance (> 5x10^10), sub-ns switching time of 210 ps, and operate with power as low as 300 pJ.

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