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Paper Citation Record · LEDGER

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM)

As of 17 August 2026, this Paper Citation Record lists 68 of 68 outbound references and 0 inbound Pith citation observations for arXiv:2411.09546.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2411.09546 v1

Coverage vector

measured 68 of 68 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-12T20:37:37.597763Z

measured 68 of 68 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-17T06:30:58.91139+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

68 of 68 outbound references displayed

  • verified exact1
  • verified fuzzy59
  • unresolved6
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch2

External citation measurements

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Outbound references

Observation 42c1a49d-9169-4db2-a559-f0ed545c714c · outbound

This paper cites A 65 nm 1.4-6.7 TOPS/W Adaptive-SNR Sparsity-Aware CIM Core with Load Balancing Support for DL work- loads,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A 65 nm 1.4-6.7 TOPS/W Adaptive-SNR Sparsity-Aware CIM Core with Load Balancing Support for DL work- loads,

Reference 1

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation bfeda15e-591a-4d90-9f36-47dedf7ef987 · outbound

This paper cites EASI-CiM: Event-driven Asynchronous Stream-based Im- age classifier with Compute-in-Memory kernels,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) EASI-CiM: Event-driven Asynchronous Stream-based Im- age classifier with Compute-in-Memory kernels,

Reference 2

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.238388Z digest=sha256:a4750ac06c05146e810d009b598c7c14d12204a7bc4c94d9ef8873f869739edd

Observation 9bbbce45-4a69-4f60-8be4-0b538d31c667 · outbound

This paper cites A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference,

Reference 3

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

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Observation bd6f9b5c-b8c6-4301-ac20-0e7da0705f28 · outbound

This paper cites A Local Computing Cell and 6T SRAM-Based Computing-in- Memory Macro With 8-b MAC Operation for Edge AI Chips,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Local Computing Cell and 6T SRAM-Based Computing-in- Memory Macro With 8-b MAC Operation for Edge AI Chips,

Reference 4

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.251400Z digest=sha256:09e0f5d148cff6c98717cfec7c665059e06255d178db174c1a8163ad643551ef

Observation 5aa7bfba-4f18-43ba-8707-097f153c1732 · outbound

This paper cites A Variation-Tolerant In-Memory Machine Learning Classifier via On-Chip Training,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Variation-Tolerant In-Memory Machine Learning Classifier via On-Chip Training,

Reference 5

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.256775Z digest=sha256:f61a893d567bc79e710f1dca3b2e485e3a29c91135162cb5ed1b572b305c88a1

Observation 5a3652fa-ca85-4889-b4cb-924f3a32fdc6 · outbound

This paper cites IMAC: In-memory multi-bit multiplication and ACcumulation in 6T SRAM array,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) IMAC: In-memory multi-bit multiplication and ACcumulation in 6T SRAM array,

Reference 6

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.261911Z digest=sha256:61ae9bb88a223da2a1c122b9a6012fae2231215cea111a80666069a3d3672aa1

Observation 00b873eb-37a1-454a-988f-0fe6d8f41266 · outbound

This paper cites A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network,

Reference 7

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.268086Z digest=sha256:c0e94bc3ea9a2dc3e15803ce6408659de3f499685027424e425e7afe12ec0b42

Observation 5b857eb5-865a-4a95-a828-f02853a17414 · outbound

This paper cites A 28 nm 16 Kb Bit-Scalable Charge-Domain Transpose 6T SRAM In- Memory Computing Macro,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A 28 nm 16 Kb Bit-Scalable Charge-Domain Transpose 6T SRAM In- Memory Computing Macro,

Reference 8

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.273142Z digest=sha256:75b23ed52b57516676636618c7710de5a46e72a020d3585473efb65f3479ee82

Observation 1c749054-ace9-41a2-8e1b-fd039420a85c · outbound

This paper cites Conv-RAM: An energy-efficient SRAM with embedded convolution computation for low-power CNN- based machine learning applications,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Conv-RAM: An energy-efficient SRAM with embedded convolution computation for low-power CNN- based machine learning applications,

Reference 9

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.280086Z digest=sha256:c9cfe29f6c40e3fd36cd45af10824138d1f26f74009cc4d8def63062a597f278

Observation 4d7cd355-080b-420a-a004-023b853136c1 · outbound

This paper cites A Resonant Time- Domain Compute-in-Memory (rTD-CiM) ADC-Less Architecture for MAC Operations,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Resonant Time- Domain Compute-in-Memory (rTD-CiM) ADC-Less Architecture for MAC Operations,

Reference 10

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Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T20:37:37.285400Z digest=sha256:f95e82b7978983a3b5f96a685f3f3e11267a6c05692a7e905dbdb7fed876fdd0

Observation 9322fc74-c569-4318-a2f7-300ab5b56a0a · outbound

This paper cites Design and Analysis of Multibit Multiply and Accumulate (MAC) unit: An Analog In-Memory Computing Approach,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Design and Analysis of Multibit Multiply and Accumulate (MAC) unit: An Analog In-Memory Computing Approach,

Reference 11

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.291015Z digest=sha256:a1fc5e047f2e1fdbc96b96d9428a99e74226dced8b68bcb2ff299cb514558005

Observation 18679b6f-8584-4489-9f65-7dd09968dfde · outbound

This paper cites CiMComp: An Energy Effi- cient Compute-in-Memory Based Comparator for Convolutional Neural Networks,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) CiMComp: An Energy Effi- cient Compute-in-Memory Based Comparator for Convolutional Neural Networks,

Reference 12

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.296210Z digest=sha256:4ec50363239318631246e073691e8196f0a9166e9216009bd15025e007a2f1cc

Observation 8f5922e2-3b4b-4445-bb9a-f8ce5ebbb82f · outbound

This paper cites A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture,

Reference 13

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.301007Z digest=sha256:9fd5ab54c998711a0fb5722c8160c226312144adad0bf88b716554aeb7353b13

Observation 557939eb-041d-496b-9e42-03332b484da7 · outbound

This paper cites A 129.83 TOPS/W Area Efficient Digital SOT/STT MRAM-Based Computing-In-Memory for Advanced Edge AI Chips,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A 129.83 TOPS/W Area Efficient Digital SOT/STT MRAM-Based Computing-In-Memory for Advanced Edge AI Chips,

Reference 14

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.306683Z digest=sha256:803bedf3ce118e2d673a8a38221303e3d6f98805d250ff55baa41dc6825ddccf

Observation 37baa3f9-54c0-4f6c-9cb6-08a7a1ba8b76 · outbound

This paper cites An 8b-Precision 6T SRAM Computing-in- Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) An 8b-Precision 6T SRAM Computing-in- Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips,

Reference 15

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.311998Z digest=sha256:71be02382a43e43bc454bb29b7e3e504e5b5d6550d010db9b9ec961e3ba53ce6

Observation bdcd625a-6117-4318-bcdf-66e531290ad7 · outbound

This paper cites SUN: Dynamic Hybrid-Precision SRAM-Based CIM Accelerator With High Macro Utilization Using Structured Pruning Mixed-Precision Networks,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) SUN: Dynamic Hybrid-Precision SRAM-Based CIM Accelerator With High Macro Utilization Using Structured Pruning Mixed-Precision Networks,

Reference 16

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.317612Z digest=sha256:aefab637dbe3a856d5169ccf116930db0f486f655a42dabbfc71a13983d942bf

Observation 70047c52-dc36-46a5-a57e-c8d6e770a0f8 · outbound

This paper cites A Hierarchically Reconfigurable SRAM-Based Compute-in-Memory Macro for Edge Computing,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Hierarchically Reconfigurable SRAM-Based Compute-in-Memory Macro for Edge Computing,

Reference 17

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source=pdf_text observed=2026-08-12T20:37:37.323097Z digest=sha256:551cf123eca81085350561ac5a48655c660ef4456ecd6e2739e327f7597cbee9

Observation 2bd54292-3cea-42ee-b21c-bbe8f36093ec · outbound

This paper cites Impact of Aging and Process Vari- ability on SRAM-Based In-Memory Computing Architectures,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Impact of Aging and Process Vari- ability on SRAM-Based In-Memory Computing Architectures,

Reference 18

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.328867Z digest=sha256:5a0b3bdca61129e913e072179c1c3adc15715caac8d38c1b517d23e4b493c8b7

Observation 9fa85e38-b084-482c-859e-cb90bbfc5fed · outbound

This paper cites An Area-Efficient In-Memory Implementation Method of Arbitrary Boolean Function Based on SRAM Array,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) An Area-Efficient In-Memory Implementation Method of Arbitrary Boolean Function Based on SRAM Array,

Reference 19

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.333615Z digest=sha256:c1af72eb3f1227d0062711ccfd03cd9800f6ae099f8814d2dc478cd6e33564f7

Observation 2e005c6e-f280-451a-8b6c-9b65eafee99c · outbound

This paper cites PIC-RAM: Process- Invariant Capacitive Multiplier Based Analog In Memory Computing in 6T SRAM,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) PIC-RAM: Process- Invariant Capacitive Multiplier Based Analog In Memory Computing in 6T SRAM,

Reference 20

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.338767Z digest=sha256:e76d9671002c454da73452dab082c5793baf4f3e81de37cb0d038be8bf7d8b30

Observation 7de5c87d-156d-43ed-b7f3-56e5d136f4a5 · outbound

This paper cites En- abling Energy-Efficient In-Memory Computing With Robust Assist- Based Reconfigurable Sense Amplifier in SRAM Array,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) En- abling Energy-Efficient In-Memory Computing With Robust Assist- Based Reconfigurable Sense Amplifier in SRAM Array,

Reference 21

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.343534Z digest=sha256:fdea4dc550bff44755c4a26985b33e8ac2097ae4a1e0364ff88593d935da735a

Observation efc7b97f-a160-4817-bb9d-a97cee26bf39 · outbound

This paper cites 14.2 A Compute SRAM with Bit-Serial Integer/Floating- Point Operations for Programmable In-Memory Vector Acceleration,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) 14.2 A Compute SRAM with Bit-Serial Integer/Floating- Point Operations for Programmable In-Memory Vector Acceleration,

Reference 22

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.348331Z digest=sha256:c920b220dc39a57807bc5d3b825fe119b20b8c95d6e1bca6bbf1f29245fd125c

Observation 8b8ea889-0ce6-4ad3-ab14-faf868e8b8e4 · outbound

This paper cites Analysis and Optimization Strategies Toward Reliable and High-Speed 6T Compute SRAM,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Analysis and Optimization Strategies Toward Reliable and High-Speed 6T Compute SRAM,

Reference 23

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.353002Z digest=sha256:45ec45a2730976eaaf89e74093c57679a707f0aeff9bcfc18fec612e4f4dee08

Observation 4d23afc3-c9c9-47cc-b1ed-30a89dd2738f · outbound

This paper cites A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Reliable 8T SRAM for High-Speed Searching and Logic-in-Memory Operations,

Reference 24

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.358102Z digest=sha256:87ddc0ae739ef482fb20ad53289c4434dc5dab6516a1f306dbbccdaacaf4bd55

Observation d3b4a704-409e-41c0-af59-e17c4ae4840b · outbound

This paper cites A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing,

Reference 25

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raw_fallback, observed 2026-08-12T20:37:38.766066Z

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No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.362908Z digest=sha256:c57f76a1127161ef69405bb118ceaef5cab9d06d86bd393e59b3ccd4107cbcec

Observation 84a77069-6af6-4aaa-a255-0cdd692a2e77 · outbound

This paper cites NUTS-BSNN: A non-uniform time-step binarized spiking neural network with energy-efficient in-memory computing macro,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) NUTS-BSNN: A non-uniform time-step binarized spiking neural network with energy-efficient in-memory computing macro,

Reference 26

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.367900Z digest=sha256:b3189c0b9e88d081f9fd39237b04202ff88e3ea4c9371f1437dc4069d1272416

Observation a2cae7a6-3e45-4b72-bfca-1b13db88908b · outbound

This paper cites CafeHD: A Charge-Domain FeFET-Based Compute-in- Memory Hyperdimensional Encoder with Hypervector Merging,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) CafeHD: A Charge-Domain FeFET-Based Compute-in- Memory Hyperdimensional Encoder with Hypervector Merging,

Reference 27

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raw_fallback, observed 2026-08-12T20:37:38.731630Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.372923Z digest=sha256:86e2efebd8dad01c752f1a364ed5afbaad60c1e66b580dcb5aba85893c2cc578

Observation a0f8411e-3d39-4eed-b065-80aeeca85378 · outbound

This paper cites CILP: An Arbitrary-bit Precision All-digital Compute-in-memory Solver for Integer Linear Programming Problems,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) CILP: An Arbitrary-bit Precision All-digital Compute-in-memory Solver for Integer Linear Programming Problems,

Reference 28

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Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.378061Z digest=sha256:4593f3517d51575d8b19080e84ce062d58b8ab370e4b2852562543213dfd6afd

Observation 5eea7bb7-a1d0-4de8-bc09-5f27b3992de4 · outbound

This paper cites A Scalable and Reconfigurable Bit-Serial Compute-Near-Memory Hardware Accelerator for Solving 2-D/3-D Partial Differential Equations,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Scalable and Reconfigurable Bit-Serial Compute-Near-Memory Hardware Accelerator for Solving 2-D/3-D Partial Differential Equations,

Reference 29

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raw_fallback, observed 2026-08-12T20:37:38.689986Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.384033Z digest=sha256:ae26892f319734941b07be8d7b89a17e3ae2e52a7890878445e81ad1ec96d7dd

Observation a4af1b8c-6d42-464a-83db-aa47c81f65de · outbound

This paper cites Efficient and lightweight in-memory computing architecture for hardware security,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Efficient and lightweight in-memory computing architecture for hardware security,

Reference 30

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raw_fallback, observed 2026-08-12T20:37:38.671544Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.389832Z digest=sha256:8ef83725562e4878596f0848ce770fa3bbefeb35489dcdabed600d23f90d2f71

Observation 75b93be4-4945-4d4d-aa40-607f705087d2 · outbound

This paper cites Energy Efficient Data Search Design and Optimization Based on a Compact Ferroelectric FET Content Addressable Memory,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Energy Efficient Data Search Design and Optimization Based on a Compact Ferroelectric FET Content Addressable Memory,

Reference 31

Resolution
unresolved
no resolver link, observed 2026-08-12T20:37:37.396279Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T20:37:37.396279Z digest=sha256:1796333a239e331fd1bd4aecaff1bdf3b621f8c03894ed627e3366ca37e04e94

Observation 714a5225-e10e-4562-89b7-4340bc71d0fc · outbound

This paper cites BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory,

Reference 32

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.653686Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.401549Z digest=sha256:cec48edcbc39b790525787eab71466368fdd86279e07743bd525593e3bccc9e2

Observation edeea3d2-a4c8-4090-92c3-b01986108e8e · outbound

This paper cites A Reliable and High-Speed 6T Compute-SRAM Design With Dual-Split-VDD Assist and Bitline Leakage Compensation,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Reliable and High-Speed 6T Compute-SRAM Design With Dual-Split-VDD Assist and Bitline Leakage Compensation,

Reference 33

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.634631Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.407202Z digest=sha256:c46f21c47118535a1e7a994ffa017c849de53a081194c24844a09c6aa7a2379c

Observation e948ccd9-8f7a-448e-a843-72ffc50e3778 · outbound

This paper cites A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory,

Reference 34

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.617210Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.412002Z digest=sha256:3bca5e44799c816377af5fdff46c906b7251e449ba51e90bd29db4c03c08ef64

Observation 4f1e1278-5bb2-4f53-9ccf-56117ca9c2f9 · outbound

This paper cites Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical Decoupled Read Ports,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical Decoupled Read Ports,

Reference 35

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.595467Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.416748Z digest=sha256:dfad86f9fc86aed5b70df92234c6645bbaf30b220b088b73ec183d5c99a1a3fd

Observation 2a7319b8-bae3-4b55-92ed-7899397d3c21 · outbound

This paper cites CAMA: Energy and Memory Efficient Automata Processing in Content-Addressable Memories,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) CAMA: Energy and Memory Efficient Automata Processing in Content-Addressable Memories,

Reference 36

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.578534Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.421609Z digest=sha256:8635feab33c9778292f9e35437e5d31f9222d70d4126c8f1fa2a2cbfe9f65feb

Observation 6a474189-a4fd-4ba1-83ac-01c26f00d87b · outbound

This paper cites ABC: An academic industrial-strength verification tool,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) ABC: An academic industrial-strength verification tool,

Reference 37

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.560516Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.426334Z digest=sha256:c41f32a467bcbb32d2fc83fc05a0099dd32261f685336e584cab77df2c5211ce

Observation fbe3fd6a-3a15-4777-a50d-b822642e8deb · outbound

This paper cites Yosys Open SYnthesis Suite,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Yosys Open SYnthesis Suite,

Reference 38

Resolution
unresolved
no resolver link, observed 2026-08-12T20:37:37.431152Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T20:37:37.431152Z digest=sha256:afd92dd90e057be94ca6435a947b60e2529b80c9a152bfbd376a8ac13e39a111

Observation 927e5f04-0e50-41b9-86e3-a36f359f42fe · outbound

This paper cites The EPFL combi- national benchmark suite,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) The EPFL combi- national benchmark suite,

Reference 39

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.530878Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.437000Z digest=sha256:998c1bf5fbb01225a2d1f458fc72c3bb5845c93a10d8b1289762c6b0b62b5f0c

Observation be1d63f6-7bf2-4e98-8c99-7ce315564803 · outbound

This paper cites A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid- Domain Structure for Advanced AI Edge Chips,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid- Domain Structure for Advanced AI Edge Chips,

Reference 40

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.514001Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.442594Z digest=sha256:74ca4bbdbdae0af4ed4ffe3276703af0722d6672d2d1535a3625cac9bcf4f96e

Observation 1d440ef0-7877-4b39-a7b4-3a30c3fc9dc9 · outbound

This paper cites DDC-PIM: Efficient Algo- rithm/Architecture Co-design for Doubling Data Capacity of SRAM- Based Processing-In-Memory,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) DDC-PIM: Efficient Algo- rithm/Architecture Co-design for Doubling Data Capacity of SRAM- Based Processing-In-Memory,

Reference 41

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.493435Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.447609Z digest=sha256:04d1f8d15c7ff5ae8cf7b717d13a46d03a1453e418d16f4f0aafc24b5d52f43c

Observation ac133d2f-a606-4e1e-91f1-8852b415afe1 · outbound

This paper cites ADRA: Ex- tending Digital Computing-In-Memory With Asymmetric Dual-Row- Activation,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) ADRA: Ex- tending Digital Computing-In-Memory With Asymmetric Dual-Row- Activation,

Reference 42

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.476116Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.452490Z digest=sha256:2e4a621f9cd836fdd0ffb208a7cc5ba7a351e77bd340100db93dc5c417c7249c

Observation 81db6012-b498-4b6f-bd23-fd980c1e5886 · outbound

This paper cites In-Memory Wallace Tree Multipliers Based on Majority Gates Within V oltage-Gated SOT-MRAM Crossbar Arrays,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) In-Memory Wallace Tree Multipliers Based on Majority Gates Within V oltage-Gated SOT-MRAM Crossbar Arrays,

Reference 43

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.454692Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.457372Z digest=sha256:282e7ce6d40b933cb8acb4c250647e71b1609feefb9cf0833a824f8208003ae8

Observation bdb6fb2e-7319-44ef-858b-e07ab78004e7 · outbound

This paper cites X-Former: In-Memory Acceleration of Transformers,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) X-Former: In-Memory Acceleration of Transformers,

Reference 44

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.436427Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.462597Z digest=sha256:2a20f7e6a39aafebe7d74dc0bc22a0f56d08561b4315d8c0c18daca78c2e7203

Observation 782375a3-122d-4427-9bf8-b9c093a0bbec · outbound

This paper cites ADC-Less Reprogrammable RRAM Array Architecture for In-Memory Computing,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) ADC-Less Reprogrammable RRAM Array Architecture for In-Memory Computing,

Reference 45

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.418300Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.467519Z digest=sha256:8406c136d4f13ed1e804bfe73e280bec6a1a9440e108cb3693fa794af96ffebf

Observation 861f51be-e029-47f2-9963-023164c51a48 · outbound

This paper cites HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer,

Reference 46

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.395616Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.472401Z digest=sha256:b1707d81b667017f4af7941fee05c4f05dac308d98614058b7fc2f9b3854b0fe

Observation 6d471a98-457f-4a5b-a145-f2eb6ae71ed6 · outbound

This paper cites An RRAM-Based Computing-in-Memory Architecture and Its Application in Accelerating Transformer Inference,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) An RRAM-Based Computing-in-Memory Architecture and Its Application in Accelerating Transformer Inference,

Reference 47

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.375408Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.478183Z digest=sha256:b769a823819a16c7e56af425881d79efdc0d389692ee3ebe318c68e8827e97b5

Observation 47233c68-2bd0-47d3-9e64-0bb7932e74fb · outbound

This paper cites Layout-Aware Area Optimization of Transposable STT-MRAM for a Processing-In-Memory System,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Layout-Aware Area Optimization of Transposable STT-MRAM for a Processing-In-Memory System,

Reference 48

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.351136Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.483742Z digest=sha256:76caf54d45b1ac26ddcbae8aa21cfa8fc96d4bcb31354f10a13d1b32032ed148

Observation e82b6b66-e8be-4630-9494-073ed880b915 · outbound

This paper cites CP-SRAM: Charge-Pulsation SRAM Marco for Ultra-High Energy-Efficiency Computing-in-Memory,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) CP-SRAM: Charge-Pulsation SRAM Marco for Ultra-High Energy-Efficiency Computing-in-Memory,

Reference 49

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T20:37:37.838790Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.489367Z digest=sha256:14b6def6abe8f9a434c74182043deded6cabad605ce550de69f4b78fd379e1be

Observation 472f5bf2-56e9-472c-b9b3-d6ada41f21c3 · outbound

This paper cites OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesis.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesis

Reference 50

Resolution
unresolved
no resolver link, observed 2026-08-12T20:37:37.495094Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T20:37:37.495094Z digest=sha256:43e2b99961ba5b4259962470c29147e8ecfbeb9a664a30783591e9d8330ebd29

Observation 4488e2ec-694a-4048-bae6-fd9d451eecac · outbound

This paper cites Resonant Energy Recycling SRAM Architecture,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Resonant Energy Recycling SRAM Architecture,

Reference 51

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.331976Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.501251Z digest=sha256:f9cca94e5209800dabf6517d4bba874841dc087cef6cf5e2a4ad7fc9a6a56413

Observation 9d7038de-1a30-46d0-b47a-9c4adf196a3c · outbound

This paper cites A Low V oltage SRAM Using Resonant Supply Boosting,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A Low V oltage SRAM Using Resonant Supply Boosting,

Reference 52

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.311365Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.508942Z digest=sha256:2a569ecaca4ccae4ca86f314a876c09bb09640133dd996a872097d8f4698f839

Observation 64992f59-d92f-4c42-a6ae-914f61f31bec · outbound

This paper cites Design Automation of Series Resonance Clocking in 14-nm FinFETs,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Design Automation of Series Resonance Clocking in 14-nm FinFETs,

Reference 53

Resolution
verified exact
doi, observed 2026-08-12T20:37:37.647157Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.515096Z digest=sha256:31816d71e3a4570f1598a6f65e2906e600b9168771caf954c071bc056c454cd5

Observation 4b4064c3-5aca-4f01-9516-3e3a222d79a3 · outbound

This paper cites Power and Skew Reduction Using Resonance Energy Recycling in FinFET based Wideband Clock Networks,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Power and Skew Reduction Using Resonance Energy Recycling in FinFET based Wideband Clock Networks,

Reference 54

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.287138Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.521410Z digest=sha256:cb5316ed7940c99b3b86e11c09edd2ac3b9d2e335b01a6c92f2e24cbd945dbf2

Observation bf1e39c3-4f5d-4992-be4e-5ff7d5a1d30b · outbound

This paper cites Power and skew reduction using resonant energy recycling in 14-nm FinFET clocks,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Power and skew reduction using resonant energy recycling in 14-nm FinFET clocks,

Reference 55

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.265658Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.526470Z digest=sha256:f5c3ab1b8359a88b2e41ffe2c4fbd94a767888f204fb705d9951c02e5e3d9bd0

Observation 5765fcea-dc2e-4d1d-99bf-ab13b786dace · outbound

This paper cites System and methods of reducing wideband series resonant clock skew,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) System and methods of reducing wideband series resonant clock skew,

Reference 56

Resolution
unresolved
no resolver link, observed 2026-08-12T20:37:37.533185Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T20:37:37.533185Z digest=sha256:84058b4281056066eccfb11473fff880b651cb848b108234849c3e8a9c1ac25a

Observation c881f1a4-9d27-432b-9787-7b552233236f · outbound

This paper cites Low-Power Resonant Clocking Using Soft Error Robust Energy Recovery Flip-Flops,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Low-Power Resonant Clocking Using Soft Error Robust Energy Recovery Flip-Flops,

Reference 57

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.235707Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.539021Z digest=sha256:6c87a21bd0a01f892c89c7978d9342be59132eb344eff6a5cb5616a8bfb491a7

Observation 099f57d9-3c81-49ff-b767-4ee1fca9051b · outbound

This paper cites Resonant Compute- In-Memory (rCIM) 10T SRAM Macro for Boolean Logic,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Resonant Compute- In-Memory (rCIM) 10T SRAM Macro for Boolean Logic,

Reference 58

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.216073Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.544587Z digest=sha256:964e028cf04dcd9100666429767d2a69c735ad25d4feba7047af669162e0180b

Observation d89a2365-bdb2-4764-924a-b9db2c981af9 · outbound

This paper cites OpenRAM: An open-source memory compiler,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) OpenRAM: An open-source memory compiler,

Reference 59

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.194345Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.550426Z digest=sha256:17974835eb95994ad218d9883d9f5a3b4128142c6f654a3db6b75bca92ae7688

Observation 5671e66b-84f9-4d49-8cd2-773c66b42eda · outbound

This paper cites Virtual Prototyper (ViPro): An Early Design Space Exploration and Optimization Tool for SRAM Designers,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Virtual Prototyper (ViPro): An Early Design Space Exploration and Optimization Tool for SRAM Designers,

Reference 60

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T20:37:37.739827Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.555939Z digest=sha256:5e56d357cfeb99dfc31bddc750e4e11a317fbf489a8926aa689947f1e787003f

Observation c57253c0-d5f7-41a9-8e3f-17fbfd0dc8ca · outbound

This paper cites Open- SAR: An Open Source Automated End-to-end SAR ADC Compiler,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Open- SAR: An Open Source Automated End-to-end SAR ADC Compiler,

Reference 61

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.170325Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.561799Z digest=sha256:7c6cb4c7363b9ff5e519e75e5647127e40a9c51ddf1976f89ab9de4532f7ab49

Observation 5c6d7296-42aa-44d2-87f6-1f0b058d080d · outbound

This paper cites AutoDCIM: An Automated Digital CIM Compiler,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) AutoDCIM: An Automated Digital CIM Compiler,

Reference 62

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.140355Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.567133Z digest=sha256:e70267b3b28e6c54fc49f8b2ab255856a184f0041fa70fd678223e3e58c4c247

Observation 1db4d232-6498-4c75-aa7f-7271c34cd5a8 · outbound

This paper cites an unresolved cited work.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Unresolved cited work

Reference 63

Resolution
unresolved
raw_fallback, observed 2026-08-12T20:37:38.118316Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.573108Z digest=sha256:84cf48bfacf6a9d2c7d958a41a2dd460396de490994b2830087bfc0b2b2a44e8

Observation 8d809285-bb35-45c2-9b1a-4bc8b2fe5b4e · outbound

This paper cites Bit parallel 6t sram in-memory computing with reconfigurable bit-precision,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Bit parallel 6t sram in-memory computing with reconfigurable bit-precision,

Reference 64

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.091378Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.578045Z digest=sha256:7f6e5766bc3191db99441fd784a5250fadd7a35b5f9257b9825ad05a24424d09

Observation 9f858953-a8c7-48f1-921d-8a6dec6cd86e · outbound

This paper cites A 40-nm cmos multifunctional computing-in-memory (cim) using single-ended disturb-free 7t 1-kb sram,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A 40-nm cmos multifunctional computing-in-memory (cim) using single-ended disturb-free 7t 1-kb sram,

Reference 65

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.072546Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.582819Z digest=sha256:4d15f7ab3b1a4255e1ffc1f89552ac65fd8422452b64a47e88efbf08502c36cb

Observation cb7239a8-57b3-48e8-9714-35c7884af015 · outbound

This paper cites A fast, reliable and wide-voltage-range in-memory computing architecture,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) A fast, reliable and wide-voltage-range in-memory computing architecture,

Reference 66

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.050902Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.587333Z digest=sha256:b8fa71bf33297370334579f5f328bd4c2ea1bedaa91ff9ae4fae01ceabcb8642

Observation f6459210-c08f-411f-9d4d-c39b65d9fcd5 · outbound

This paper cites In situ storing 8t sram-cim macro for full-array boolean logic and copy operations,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) In situ storing 8t sram-cim macro for full-array boolean logic and copy operations,

Reference 67

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.030160Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.592513Z digest=sha256:e31a2e0d3e43ad7b346b0cf2cf3e578d67a33e83a63eaec5a86ea85f325f2df8

Observation a47bbe8e-4030-4389-9389-bc1a2c52b821 · outbound

This paper cites Design of ion-implanted mosfet’s with very small physical dimensions,.

Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM) Design of ion-implanted mosfet’s with very small physical dimensions,

Reference 68

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T20:37:38.011706Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.

source=pdf_text observed=2026-08-12T20:37:37.597763Z digest=sha256:956d0993da614a7c9276f468e7109f9e8aa9d1aa915263f97e228df943bba303

Pith citing papers

No inbound Pith citation observations are available.