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A Linear Bayesian Learning Receiver Scheme for Massive MIMO Systems

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arxiv 2110.14138 v1 pith:MH6K5CL4 submitted 2021-10-27 cs.IT eess.SPmath.IT

classification cs.ITeess.SPmath.IT
keywords linearbayesianreceiverlatencym-mimommseprocessingreceivers
verification ladder T0 review T1 audit T2 compute T3 formal
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abstract

Much stringent reliability and processing latency requirements in ultra-reliable-low-latency-communication (URLLC) traffic make the design of linear massive multiple-input-multiple-output (M-MIMO) receivers becomes very challenging. Recently, Bayesian concept has been used to increase the detection reliability in minimum-mean-square-error (MMSE) linear receivers. However, the latency processing time is a major concern due to the exponential complexity of matrix inversion operations in MMSE schemes. This paper proposes an iterative M-MIMO receiver that is developed by using a Bayesian concept and a parallel interference cancellation (PIC) scheme, referred to as a linear Bayesian learning (LBL) receiver. PIC has a linear complexity as it uses a combination of maximum ratio combining (MRC) and decision statistic combining (DSC) schemes to avoid matrix inversion operations. Simulation results show that the bit-error-rate (BER) and latency processing performances of the proposed receiver outperform the ones of MMSE and best Bayesian-based receivers by minimum $2$ dB and $19$ times for various M-MIMO system configurations.

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