Paper Citation Record · LEDGER

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models

As of 16 August 2026, this Paper Citation Record lists 34 of 34 outbound references and 0 inbound Pith citation observations for arXiv:2608.13472.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2608.13472 v1

Coverage vector

measured 34 of 34 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-14T10:19:28.762673Z

measured 34 of 34 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-16T06:30:59.297886+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

34 of 34 outbound references displayed

verified exact1
verified fuzzy19
unresolved14
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation c43e5269-bb1b-4504-a711-a8ccb559997e · outbound

This paper cites Applications of Artificial Intelligence on the Modeling and Optimization for Analog and Mixed-Signal Circuits: A Review,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Applications of Artificial Intelligence on the Modeling and Optimization for Analog and Mixed-Signal Circuits: A Review,

Reference 1

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.591161Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation baf6b6f0-2b17-4d79-a730-bef8bfdaaef2 · outbound

This paper cites ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Net- works,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Net- works,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.237344Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation d9e77e6e-0398-446e-98ad-22fcbc0fc586 · outbound

This paper cites AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.222197Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 5f313593-b236-4d71-a091-e065ae9a6974 · outbound

This paper cites ORACLE: A Multi-Objective Reinforcement Learning-Based Analog Circuit Design Optimizer with Large Language Models-Guided Exploration.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models ORACLE: A Multi-Objective Reinforcement Learning-Based Analog Circuit Design Optimizer with Large Language Models-Guided Exploration

Reference 4

Resolution: verified exact; local_arxiv, observed 2026-08-14T10:19:28.916435Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 0a8b4105-20d2-48bf-a784-c4d0e6247203 · outbound

This paper cites FASCINET: A Fully Automated Single-Board Computer Generator Using Neural Networks,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models FASCINET: A Fully Automated Single-Board Computer Generator Using Neural Networks,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.207425Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 2c2740f2-41b1-4899-a438-a74a85115bb2 · outbound

This paper cites An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.191839Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 753d3992-9107-4a68-87f5-dc6d296ec68d · outbound

This paper cites AnGeL: Fully- Automated Analog Circuit Generator Using a Neural Network Assisted Semi-Supervised Learning Approach,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AnGeL: Fully- Automated Analog Circuit Generator Using a Neural Network Assisted Semi-Supervised Learning Approach,

Reference 7

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.626122Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation acbfee2b-5747-42fb-bb96-91a4d1fe70f9 · outbound

This paper cites MuaLLM: A Multimodal Large Language Model Agent for Circuit Design Assistance with Hybrid Contextual Retrieval- Augmented Generation,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models MuaLLM: A Multimodal Large Language Model Agent for Circuit Design Assistance with Hybrid Contextual Retrieval- Augmented Generation,

Reference 8

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.631123Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 3747463f-3fb4-4a22-9d9e-e30ba3d1a12c · outbound

This paper cites SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence,

Reference 9

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.636307Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d81f9c6b-2580-4163-9684-351ff4dc29b3 · outbound

This paper cites Retrieval-Augmented Generation for Knowledge-Intensive NLP Tasks,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Retrieval-Augmented Generation for Knowledge-Intensive NLP Tasks,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.144165Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation d3df2160-6f55-4816-99b0-95d8c483267f · outbound

This paper cites BERT: Pre-training of Deep Bidirectional Transformers for Language Understanding,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models BERT: Pre-training of Deep Bidirectional Transformers for Language Understanding,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.127836Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation cfa53172-3ec7-44c4-8efe-ec300d07cac7 · outbound

This paper cites Attention is All you Need,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Attention is All you Need,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.112444Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 0b7b85f7-806b-4e39-9c3c-4eccac295f0c · outbound

This paper cites Dataset Construction for Training LLM to Learn Analog Circuit Knowledge.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Dataset Construction for Training LLM to Learn Analog Circuit Knowledge

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.653936Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 27809fbc-2b91-4f5d-b08f-2cbf285850bf · outbound

This paper cites LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits

Reference 14

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.659624Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2d40b097-da51-43e7-bab7-1ffb22066de4 · outbound

This paper cites AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-design Using Knowledge Graph RAG,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-design Using Knowledge Graph RAG,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.098572Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation f5158084-8ae3-4a09-996b-0344d05d4453 · outbound

This paper cites AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting

Reference 16

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.669248Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d5032312-274b-43a3-9f88-3f1782d98094 · outbound

This paper cites AnalogCoder: Analog Circuit Design via Training-Free Code Generation,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AnalogCoder: Analog Circuit Design via Training-Free Code Generation,

Reference 17

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.673852Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6ea56c73-7bc9-4d0d-a4ee-c47926f23e68 · outbound

This paper cites AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologies.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologies

Reference 18

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.678375Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 224a05a4-a9ce-48b9-91a6-33e48de94e8f · outbound

This paper cites AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.077316Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 7b0fe81e-6dfb-4afb-bc9c-8812dc9410b3 · outbound

This paper cites AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.688811Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation add0aefb-eeb9-4cdc-9bbc-7a1a8f691380 · outbound

This paper cites AnaFlow: Agentic LLM- based Workflow for Reasoning-Driven Explainable and Sample-Efficient Analog Circuit Sizing,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AnaFlow: Agentic LLM- based Workflow for Reasoning-Driven Explainable and Sample-Efficient Analog Circuit Sizing,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.064280Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation fc30cbc5-3c6e-428b-ac4f-2127a447f9a1 · outbound

This paper cites AutoSizer: Automatic Sizing of Analog and Mixed-Signal Circuits via Large Language Model (LLM) Agents.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AutoSizer: Automatic Sizing of Analog and Mixed-Signal Circuits via Large Language Model (LLM) Agents

Reference 22

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.699923Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 35030022-c340-4bb2-8722-ffffef28c19a · outbound

This paper cites EasySize: Elastic Analog Circuit Sizing via LLM-Guided Heuristic Search.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models EasySize: Elastic Analog Circuit Sizing via LLM-Guided Heuristic Search

Reference 23

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.704630Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4caa1403-c63a-424a-9216-5c9429c583f9 · outbound

This paper cites LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits,

Reference 24

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.050899Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 3a80acf8-7fe2-4bf4-a2ef-5db798dd6b7a · outbound

This paper cites Accelerating OTA Circuit Design: Transistor Sizing Based on a Transformer Model and Precomputed Lookup Tables,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Accelerating OTA Circuit Design: Transistor Sizing Based on a Transformer Model and Precomputed Lookup Tables,

Reference 25

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.035357Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 323f1354-8be1-4750-9855-a1b6067d9a21 · outbound

This paper cites AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs,

Reference 26

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.021103Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 10a53b0a-051c-42c9-8154-19ee0c2a3c44 · outbound

This paper cites Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model,

Reference 27

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:29.007903Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 1476973a-6be1-4285-ae65-77e94ee425bb · outbound

This paper cites Atelier: An Automated Analog Circuit Design Framework via Multiple Large Language Model-Based Agents,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Atelier: An Automated Analog Circuit Design Framework via Multiple Large Language Model-Based Agents,

Reference 28

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.729508Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 00a7ff23-e14d-441c-9814-1d52e2e161e8 · outbound

This paper cites LADAC: Large Language Model- driven Auto-Designer for Analog Circuits,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models LADAC: Large Language Model- driven Auto-Designer for Analog Circuits,

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:28.984380Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 74f26fca-a46a-4b9f-93c1-0745e028b1cc · outbound

This paper cites MenTeR: A fully-automated Multi-agenT workflow for end-to-end RF/Analog Circuits Netlist Design,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models MenTeR: A fully-automated Multi-agenT workflow for end-to-end RF/Analog Circuits Netlist Design,

Reference 30

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:28.970637Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation e73b1f2a-3999-4f21-ab8f-d9be802e216d · outbound

This paper cites CktGNN: Circuit Graph Neural Network for Electronic Design Automation.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models CktGNN: Circuit Graph Neural Network for Electronic Design Automation

Reference 31

Resolution: unresolved; no resolver link, observed 2026-08-14T10:19:28.746898Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d5644706-e349-417c-a123-d48898c39bc8 · outbound

This paper cites Transformers: State-of-the-Art Natural Language Pro- cessing,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Transformers: State-of-the-Art Natural Language Pro- cessing,

Reference 32

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:28.958384Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 714ffaf5-ae73-4a24-b4cd-9d683ed9f70e · outbound

This paper cites Robertson and H.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models Robertson and H

Reference 33

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:28.943654Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 5782bd79-9fce-4024-bb4a-21d8099ff566 · outbound

This paper cites SkyWater Open Source PDK 130nm Process Design Kit,.

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models SkyWater Open Source PDK 130nm Process Design Kit,

Reference 34

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T10:19:28.929855Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Pith citing papers

No inbound Pith citation observations are available.