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Paper Citation Record · LEDGER

Dissecting the Graphcore IPU Architecture via Microbenchmarking

As of 7 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 9 inbound Pith citation observations for arXiv:1912.03413.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
1912.03413 v1

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 9 of 9 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-06T06:34:29.942622+00:00

measured 9 of 9 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-06T17:13:37.885136Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-07-01T08:15:32.456749Z

Reference resolution

0 of 0 outbound references displayed

  • verified exact0
  • verified fuzzy0
  • unresolved0
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation cd75282c-32b4-4d92-a66b-b320668d61e7 · inbound

FlashAttention: Fast and Memory-Efficient Exact Attention with IO-Awareness cites this paper.

FlashAttention: Fast and Memory-Efficient Exact Attention with IO-Awareness Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 46

Resolution
verified exact
arxiv_id, observed 2026-05-12T16:22:08.876700Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

source=pdf_text observed=2026-05-12T16:22:08.801066Z digest=sha256:91410402e7cee6a67ae71d2893409a4f617708891d64524ca961da3f6148c05b

Observation 6bd82abd-d5a8-4094-9232-8f91ef3c306c · inbound

ELK: Exploring the Efficiency of Inter-core Connected AI Chips with Deep Learning Compiler Techniques cites this paper.

ELK: Exploring the Efficiency of Inter-core Connected AI Chips with Deep Learning Compiler Techniques Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 27

Resolution
unresolved
no resolver link, observed 2026-08-06T17:13:37.885136Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-06T17:13:37.885136Z digest=sha256:16df4c294468644134f0119e0473ea7508103eaafb6a5431584f121d8f157425

Observation b323409f-a318-45e1-8c37-3e650a2df2ba · inbound

ClusterFusion: Expanding Operator Fusion Scope for LLM Inference via Cluster-Level Collective Primitive cites this paper.

ClusterFusion: Expanding Operator Fusion Scope for LLM Inference via Cluster-Level Collective Primitive Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 16

Resolution
unresolved
no resolver link, observed 2026-08-05T16:18:06.824346Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-05T16:18:06.824346Z digest=sha256:86b1d5ea27f400af9aed4d4b130ff3a8caeea9118f4d947ee2bfc0faf1462f4f

Observation 595c9e07-48db-440f-a449-5acc02f58094 · inbound

Hardware Acceleration in Portable MRIs: State of the Art and Future Prospects cites this paper.

Hardware Acceleration in Portable MRIs: State of the Art and Future Prospects Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 120

Resolution
unresolved
no resolver link, observed 2026-08-04T23:46:34.727635Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-04T23:46:34.727635Z digest=sha256:368399d2da9bf29012a8b3520d1e9c3b8467f2f52c8b05d1badc731cf8227fba

Observation 05f60e48-f9b2-4048-86f0-08d29fdb2adc · inbound

TileLoom: Automatic Dataflow Planning for Tile-Based Languages on Spatial Dataflow Accelerators cites this paper.

TileLoom: Automatic Dataflow Planning for Tile-Based Languages on Spatial Dataflow Accelerators Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 26

Resolution
verified exact
arxiv_id, observed 2026-05-16T21:58:35.783137Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

source=pdf_text observed=2026-05-16T21:55:59.146697Z digest=sha256:5774cfe7603973b3ac8213bf87d35db3bba621327e1672c3ce65a0c1a1edba32

Observation af4e7913-71f3-4958-94fe-dc07e06a5f9e · inbound

TCL: Enabling Fast and Efficient Cross-Hardware Tensor Program Optimization via Continual Learning cites this paper.

TCL: Enabling Fast and Efficient Cross-Hardware Tensor Program Optimization via Continual Learning Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 20

Resolution
verified exact
arxiv_id, observed 2026-05-11T09:51:00.691710Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

source=pdf_text observed=2026-05-10T15:47:02.156274Z digest=sha256:e088609b991a07fae53d5a4165398f68676347b265b77e06070efae1ae3ceabb

Observation ecf7559d-e075-49b3-80db-8d543ef5e0c0 · inbound

AccelSync: Verifying Synchronization Coverage in Accelerator Pipeline Programs cites this paper.

AccelSync: Verifying Synchronization Coverage in Accelerator Pipeline Programs Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 26

Resolution
verified exact
arxiv_id, observed 2026-05-11T03:55:55.313243Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

source=pdf_text observed=2026-05-11T02:08:27.238196Z digest=sha256:e3159949412af11a55b8cb10b166385851b920b7dffa50edd8b7715498c0b577

Observation ed969cd9-7e89-49db-8714-786f87eb5679 · inbound

KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Serving cites this paper.

KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Serving Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 19

Resolution
verified exact
arxiv_id, observed 2026-05-12T06:51:27.015966Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

source=pdf_text observed=2026-05-12T03:57:30.104609Z digest=sha256:edcda5efbf54f9c338dc6abfe1867aa48ecbe54744b8b40e7c7f10fab6bed7d8

Observation 8fa3a9d2-97b7-48ea-9d45-bb2d8bc79327 · inbound

KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Serving cites this paper.

KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Serving Dissecting the Graphcore IPU Architecture via Microbenchmarking

Reference 19

Resolution
verified exact
arxiv_id, observed 2026-07-01T08:15:32.459887Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

source=pdf_text observed=2026-07-01T08:05:44.256565Z digest=sha256:ee470e800f983a36ade7b65de988b5d3dc6129935f98145bbd33455fabb078f6