REVIEW 3 major objections 4 minor 13 references
Real-time CARFAC Cochlea Model Acceleration on FPGA for Underwater Acoustic Sensing Systems
T0 review · 3 major / 4 minor · reviewed 2026-08-05 · deepseek-v4-flash
Pith's one-line read This paper shows that a 64-channel CARFAC cochlea model can run in real time on an FPGA at 256 kHz while drawing 3.11 W for the whole board, using only 13.5% of the available hardware resources.
desk verdict Solid FPGA engineering with real power/resource numbers, but the cochlea-fidelity claim rests on an approximation with a 25% saturation ceiling and no output-level validation. read the letter →
The pith
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
The reading
What carries the argument
The load-bearing mechanism is the set of division-free nonlinearity approximations combined with a time-multiplexed, pipelined architecture. The DIHC membrane conductance is approximated as $v_{\mathrm{mem}} = 0.75(1-p)^2$ with a clamped and scaled rectified input $p$, the DOHC compression as $\mathrm{NLF} = \max(0, 1 - \mathrm{sqr}/8)^8$, and the DC gain as a quadratic $g = Au^2 + Bu + C$ with lookup-table coefficients indexed by the undamping factor $u$. These replacements eliminate hardware division, reduce the gain-computation cycle count to one, and use only two DSP slices. The architecture then reuses a single AGC temporal-spatial filter for all channels via time-multiplexing, and uses
What would settle it
Measure the input-output level-compression curves of the FPGA implementation versus the original full-precision CARFAC software across the full dynamic range at 256 kHz. If the output envelope diverges substantially from the software model at high input levels, or if the level-dependent frequency tuning (bandwidth change with input level) fails to reproduce CARFAC's behavior, then the system is a fast filter bank but not a faithful cochlea model, collapsing the acoustic motivation even if the hardware metrics stand.
Extended reading notes
Core claim
The central claim is that the CARFAC cochlea model can be accelerated on an FPGA without the usual cost centers of division circuits and deep floating-point pipelines. The paper replaces the three division operations with: a squared-polynomial approximation for the DIHC membrane conductance (Eqs 4-6), an eighth-power approximation for the DOHC nonlinearity (Eq 9), and a second-degree polynomial for the DC gain (Eq 12), the last having a maximum error of 0.6%. It then time-multiplexes a single AGC temporal-spatial filter across all channels and distributes the feedback loop across roughly 100 pipeline stages. The result, measured after synthesis on a Kria KV260, is a design that uses at most
Load-bearing premise
The load-bearing premise is that the simplified fixed-point approximations still behave like the real CARFAC cochlea model at the high sound levels that matter underwater, since the DIHC and DOHC nonlinearities are only accurate for small basilar-membrane displacement and the DIHC saturates more quickly at high amplitudes.
Editorial extensions
If this is right
- Up to seven 64-channel CARFAC instances can run in parallel on the same KV260 FPGA, providing headroom for a multi-hydrophone array with each hydrophone having its own adaptive cochlea front end.
- The whole-board power of 3.11 W is low enough for battery-powered autonomous underwater vehicles, making real-time bio-inspired preprocessing feasible on energy-constrained platforms.
- The AXI4-Stream compatible accelerator with DMA transfer and a 100 MHz clock can sustain 256 kHz input in real time with minimal latency, suitable for closed-loop sensing.
- The division-free approximations and time-multiplexed AGC design reduce resource usage relative to prior FPGA CARFAC implementations, enabling scaling to higher channel counts or more parallel instances.
- Because CARFAC output retains instantaneous phase and fine temporal structure, the accelerator could feed downstream beamforming or learning-based classifiers without a frame-based Fourier transform.
Reading between the lines
- If the nonlinearity approximations hold up in high-amplitude underwater conditions, the same hardware pattern could replace the short-time Fourier transform front end in MVDR or MUSIC beamformers, since CARFAC provides level-dependent tuning while keeping phase coherence across channels.
- The time-multiplexing strategy is not specific to CARFAC: any cascade filter bank whose coefficients and feedback can be stored in BlockRAM and scheduled across channels could benefit from the same single-AGC-filter reuse and division-free polynomial fitting.
- A direct A/B validation against the full-precision CARFAC software model on real hydrophone recordings would be the natural test of whether the 0.6% gain error and the early DIHC saturation actually degrade source localization or classification performance in practice, rather than just in isolation.
- The reported 13.5% utilization suggests that even higher sampling rates or more channels per instance could be accommodated on the same device, potentially reaching multi-rate or sub-band processing without moving to a larger FPGA.
Signed reviews
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The paper presents a fixed-point, division-free FPGA implementation of the CARFAC cochlear model on the AMD Kria KV260, with a Rust software layer for hydrophone input. The hardware uses time-multiplexing and pipelining to emulate 64 channels at 256 kHz, replacing three divisions by polynomial/max approximations. Reported metrics are 13.5% peak resource utilization, 3.11 W whole-board power, <7% ARM load, and headroom for about seven parallel instances. The central claim is that this constitutes a real-time, low-power CARFAC front end for underwater acoustic sensing.
Significance. If the hardware metrics are reproducible, the contribution is useful: it is a concrete embedded CARFAC accelerator with measured power and resource figures, improving scalability over the authors' earlier FPGA CARFAC work, and the g-polynomial approximation has apparently been adopted in CARFAC v2 (with R. Lyon's involvement), lending credibility. The paper's main gap is validation: no quantitative comparison of the approximated fixed-point CARFAC against reference floating-point CARFAC is provided, so the 'faithful CARFAC' part of the claim is not yet established. The hardware efficiency claim, however, is independent and likely valid, assuming the missing Table I is supplied.
major comments (3)
- [Section II-A, Eqs. (4)–(6)] The DIHC replacement is not a small-error approximation across the operating range. The reference vmem in Eq. (1) tends to 1 as BM_hpf grows, whereas Eq. (4) tends to 0.75 because p->0. At BM_hpf=0.5, Eq. (1) gives approximately 0.356 and Eq. (4) gives 0.418 (~17% error); at BM_hpf=1.0, approximately 0.523 vs 0.648 (~24% error). The authors acknowledge the approximation 'saturates more rapidly' and 'could limit the ability to represent amplitude at high levels,' but no quantitative consequence for the AGC loop (which is driven by vmem, Fig. 4) is given. The paper needs a reference comparison (floating-point CARFAC vs the fixed-point model) across input levels, including high SPL, before the system can be called a CARFAC model for underwater sensing; the hardware metrics alone do not establish this.
- [Section II-B/II-C (AGC time-multiplexing and fixed-point quantization)] The manuscript reports no verification that the time-multiplexed single AGC temporal-spatial filter (Fig. 4) reproduces the multi-time-scale AGC loop, nor any bit-true/fixed-point error analysis ('numerical accuracy carefully monitored' is not quantified). Because fast-acting compression is the defining feature that distinguishes CARFAC from a linear filter bank, the authors should add: level-sweep compression curves, an impulse/transient test, and a representative underwater recording processed by both the approximated fixed-point system and CARFAC v2, with a quantitative error metric (e.g., RMS/PSD error or downstream localization accuracy).
- [Section III, Table I and power measurement] Table I is not populated in the submitted manuscript, so the abstract's '13.5% hardware utilization' cannot be checked against per-resource numbers. Please provide the full post-implementation utilization (logic, FF, BRAM, DSP, URAM) and define what 'hardware utilization' means. Also describe the power measurement methodology (whole-board vs SoM, wall vs PMBus, idle baseline, input signal, duration) so the 3.11 W figure is reproducible.
minor comments (4)
- [Eq. (12)] 'A, B and C are parameters that are pre-calculated lookup tables indexed by u' is ambiguous; if the coefficients are LUTs indexed by u, the expression is not a polynomial with fixed coefficients. Please clarify the implementation (one set of coefficients per channel, or a LUT over u).
- [Section II-C] Give the fixed-point formats (integer/fractional widths) chosen for the signal path and state the resulting SQNR or worst-case error for the internal variables.
- [Section III] The claim 'up to seven parallel CARFAC instances' assumes the 13.5% figure is the dominant resource; with mixed resource types, the actual parallelism limit should be stated for each resource.
- [Notation] Minor typographical/notation issues: 'zc0r' in Eq. (3) should be 'z c0 r' or 'c0 r z'; 'p8int' in Eq. (5) should read 'p_int^8'; Fig. 2 lacks axis labels for the two NLFs.
Circularity Check
No circular derivation; the hardware metrics are direct measurements and the mathematical replacements are explicitly fitted to the reference CARFAC equations.
full rationale
The paper's central claims are hardware metrics (13.5% resource utilization, 3.11 W board power, <7% ARM load) measured directly on the Kria KV260, plus a real-time processing capability derived from those measurements; these are not obtained from the cited references and therefore cannot be circular. The nonlinearity replacements (Eqs. 4–6, 9) and the polynomial approximation (Eq. 12) are explicitly fitted to the reference CARFAC equations (Eqs. 1, 8, 10), with visible fitting-error plots and a stated maximum error of 0.6%; this is a standard approximation procedure, not a prediction equivalent to its input. The self-citations [4], [9], [10] describe the authors' earlier FPGA CARFAC implementations and are used as prior-work context, not as load-bearing proof of the present result. The paper also discloses the main fidelity limitation in its own text: 'the DIHC approximation saturates more rapidly, which could limit the ability to represent amplitude at high levels.' That is a correctness risk for the 'underwater CARFAC' claim, but it is the opposite of circularity: it is an honest admission that the approximation is not identical to the reference. Hence no circular step is present; any concerns belong to validation/fidelity rather than circular reasoning.
Assumptions & free parameters
free parameters (4)
- A, B, C polynomial coefficients for g(u) =
not specified
- DIHC NLF approximation constants (0.75, 0.13, 4, 8) =
0.75, 0.13, 4, 8
- DOHC NLF approximation exponent/base (8) =
8
- Fixed-point word lengths =
24-bit input, 18-bit multiply, extra bit for additions
assumptions (3)
- domain assumption The CARFAC equations (Eqs 1-3, 7-8, 10) faithfully model cochlear processing.
- ad hoc to paper The simplified approximations (Eqs 4-6, 9, 12) and fixed-point quantization preserve the acoustic information needed for underwater localization and classification.
- ad hoc to paper A single time-multiplexed AGC temporal-spatial filter reproduces the multi-time-scale AGC loop.
Cite this review
Pith. "Pith review of Real-time CARFAC Cochlea Model Acceleration on FPGA for Underwater Acoustic Sensing Systems." pith.science (2026). https://pith.science/paper/NSEE7J5D
@misc{pith2026250807523,
author = {Pith},
title = {Pith review of: Real-time CARFAC Cochlea Model Acceleration on FPGA for Underwater Acoustic Sensing Systems},
year = {2026},
howpublished = {\url{https://pith.science/paper/NSEE7J5D}},
note = {Machine review of arXiv:2508.07523}
}
read the original abstract
This paper presents a real-time, energy-efficient embedded system implementing an array of Cascade of Asymmetric Resonators with Fast-Acting Compression (CARFAC) cochlea models for underwater sound analysis. Built on the AMD Kria KV260 System-on-Module (SoM), the system integrates a Rust-based software framework on the processor for real-time interfacing and synchronization with multiple hydrophone inputs, and a hardware-accelerated implementation of the CARFAC models on a Field-Programmable Gate Array (FPGA) for real-time sound pre-processing. Compared to prior work, the CARFAC accelerator achieves improved scalability and processing speed while reducing resource usage through optimized time-multiplexing, pipelined design, and elimination of costly division circuits. Experimental results demonstrate 13.5% hardware utilization for a single 64-channel CARFAC instance and a whole board power consumption of 3.11 W when processing a 256 kHz input signal in real time.
Figures
Reference graph
Works this paper leans on
-
[1]
Principles of underwater sound. 3rd edition.,
R. J. Urick, “Principles of underwater sound. 3rd edition.,” 1983
work page 1983
-
[2]
High-resolution frequency-wavenumber spectrum analysis,
J. Capon, “High-resolution frequency-wavenumber spectrum analysis,” Proceedings of the IEEE , vol. 57, pp. 1408–1418, 1969
work page 1969
-
[3]
Deep learning-based DOA estimation using CRNN for underwater acoustic arrays,
X. Li, J. Chen, J. Bai, M. S. Ayub, D. Zhang, M. Wang, and Q. Yan, “Deep learning-based DOA estimation using CRNN for underwater acoustic arrays,” Frontiers in Marine Science , vol. V olume 9 - 2022, 2022
work page 2022
-
[4]
A FPGA implementation of the CAR-FAC cochlear model,
Y . Xu, C. S. Thakur, R. K. Singh, T. J. Hamilton, R. M. Wang, and A. van Schaik, “A FPGA implementation of the CAR-FAC cochlear model,” Frontiers in Neuroscience , vol. 12, 4 2018
work page 2018
-
[5]
R. F. Lyon, Human and machine hearing . Cambridge University Press, 5 2017
work page 2017
-
[6]
J. Ni, F. Ji, S. Lu, and W. Feng, “An auditory convolutional neural network for underwater acoustic target timbre feature extraction and recognition,” Remote Sensing , vol. 16, no. 16, 2024
work page 2024
-
[7]
Underwater target detection and localization with feature map and CNN-Based classification,
T. Guo, Y . Song, Z. Kong, E. Lim, M. L ´opez-Ben´ıtez, F. Ma, and L. Yu, “Underwater target detection and localization with feature map and CNN-Based classification,” in 2022 4th International Conference on Advances in Computer Technology, Information Science and Com- munications (CTISC) , pp. 1–8, 2022
work page 2022
-
[8]
Y . Maymon, I. Nelken, and B. Rafaely, “Study of speaker localization with binaural microphone array incorporating auditory filters and lateral angle estimation,” 2023
work page 2023
Show all 13 references
-
[9]
Electronic cochlea: CAR-FAC model on FPGA,
Y . Xu, C. S. Thakur, R. K. Singh, R. Wang, J. Tapson, and A. Van Schaik, “Electronic cochlea: CAR-FAC model on FPGA,” Proceedings - 2016 IEEE Biomedical Circuits and Systems Conference, BioCAS 2016 , pp. 564–567, 2016
2016
-
[10]
A biologically inspired sound localisation system using a silicon cochlea pair,
Y . Xu, S. Afshar, R. Wang, G. Cohen, C. Singh Thakur, T. J. Hamilton, and A. van Schaik, “A biologically inspired sound localisation system using a silicon cochlea pair,” Applied Sciences , vol. 11, no. 4, 2021
2021
-
[11]
The CARFAC v2 cochlear model in Matlab, NumPy, and JAX,
R. F. Lyon, G. Research, R. Schonberger, M. Slaney, M. Velimirovi ´c, V . G. Deepmind, and H. Yu, “The CARFAC v2 cochlear model in Matlab, NumPy, and JAX,” 4 2024
2024
-
[12]
An FPGA implemen- tation of an event-driven unsupervised feature extraction algorithm for pattern recognition,
P. C. Jose, Y . Xu, A. van Schaik, and R. Wang, “An FPGA implemen- tation of an event-driven unsupervised feature extraction algorithm for pattern recognition,” in 2024 IEEE International Symposium on Circuits and Systems (ISCAS) , pp. 1–5, 2024
2024
-
[13]
Event-driven spectrotemporal feature extraction and classification using a silicon cochlea model,
Y . Xu, S. Perera, Y . Bethi, S. Afshar, and A. van Schaik, “Event-driven spectrotemporal feature extraction and classification using a silicon cochlea model,” Frontiers in Neuroscience, vol. 17, p. 1125210, 4 2023
2023
Reviewed August 5, 2026 · model on record in the stance chip above.
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