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Paper Citation Record · LEDGER

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems

As of 22 August 2026, this Paper Citation Record lists 10 of 10 outbound references and 0 inbound Pith citation observations for arXiv:1908.07413.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
1908.07413 v1

Coverage vector

measured 10 of 10 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-14T12:45:40.680600Z

measured 10 of 10 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-21T06:32:19.484+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

10 of 10 outbound references displayed

  • verified exact1
  • verified fuzzy6
  • unresolved3
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 82cdd941-42e2-4e7f-96c9-d1d3300a9385 · outbound

This paper cites Delbruck, B.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems Delbruck, B

Reference 1

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T12:45:40.903691Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.639464Z digest=sha256:6ebf1566d2c70ed582b01a0e46c8134d867bb35274fa3e334d701b5c3424538f

Observation eabbaaec-e97e-4aab-a0a8-b263dd05b9a0 · outbound

This paper cites an unresolved cited work.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems Unresolved cited work

Reference 2

Resolution
unresolved
raw_fallback, observed 2026-08-14T12:45:40.887966Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.643765Z digest=sha256:f364cc92ef67536022d74136a0c82c8fdb3b6047cba44197fd7e4ca381af0a45

Observation c4088fd9-c996-4232-803e-92c57b92a585 · outbound

This paper cites an unresolved cited work.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems Unresolved cited work

Reference 3

Resolution
unresolved
no resolver link, observed 2026-08-14T12:45:40.647642Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=arxiv_source observed=2026-08-14T12:45:40.647642Z digest=sha256:1b99334076edb9e4dad979657646107a1b5df1f605569160ee592680ac202cf3

Observation b81d7912-3504-44c6-b2a8-748e7fb8b464 · outbound

This paper cites A scalable multi-core architecture with heterogeneous memory structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs).

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems A scalable multi-core architecture with heterogeneous memory structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)

Reference 4

Resolution
verified exact
local_arxiv, observed 2026-08-14T12:45:40.724485Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.651646Z digest=sha256:fdf3117bcf195e59d3f3d8dc88624a3435bef8b6e4f26de100a5830c72d768d2

Observation 20a5b629-f270-4358-b429-0a715a01725b · outbound

This paper cites Indiveri, F.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems Indiveri, F

Reference 5

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T12:45:40.871448Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.656822Z digest=sha256:d168363d84ae57e657740ddd1c147e0d95d1655ae5626f1837258960b511fb93

Observation 42c2dc2f-7c9c-47c1-ae37-43fd73295576 · outbound

This paper cites an unresolved cited work.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems Unresolved cited work

Reference 6

Resolution
unresolved
raw_fallback, observed 2026-08-14T12:45:40.856740Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.661649Z digest=sha256:ebb97872d214a2549f1eafd49cce45da7e31b43fdca48238b31be90b8607f042

Observation 7115714d-3ffd-47fd-b29d-94497da6c1bc · outbound

This paper cites Brandli, R.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems Brandli, R

Reference 7

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T12:45:40.844406Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.666646Z digest=sha256:82a6830ecd8dfbd7ae71657133e7c94300ea335d0cded199c7fd86264101334a

Observation 1b9787af-ada5-4107-8790-6bbae1bf8d2c · outbound

This paper cites Zamarre \ n o-Ramos, R.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems Zamarre \ n o-Ramos, R

Reference 8

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T12:45:40.832098Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.671261Z digest=sha256:2aec47bb9203866db5d0cb2104038af08084af2bd6ca5e5759c95ce7613e2c45

Observation 4ef05399-f76c-4afd-a2c2-28a52aaa1751 · outbound

This paper cites Qiao and G.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems Qiao and G

Reference 9

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T12:45:40.818903Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.675272Z digest=sha256:cbdfc2501f1b31b8abe492e415425904b365cb3c126464b92bceaf234fc07a38

Observation 17556cb3-0477-42c9-86a4-fb8493abeee6 · outbound

This paper cites C Î) :@@wm; c[&>Sc1h df e;r 9LF=̎ 6] 'i@6l6! Sǘ!tNۺ b4KT ǵXK lT/ ^ShЕ? ¡)ղlf* ? f bU' djا5he] lM柮ٳe h& B s ƛZ!A]th !8 u B440 B i !s8CTan/I BAM[B bc^gX ,XFS4.

A bi-directional Address-Event transceiver block for low-latency inter-chip communication in neuromorphic systems C Î) :@@wm; c[&>Sc1h df e;r 9LF=̎ 6] 'i@6l6! Sǘ!tNۺ b4KT ǵXK lT/ ^ShЕ? ¡)ղlf* ? f bU' djا5he] lM柮ٳe h& B s ƛZ!A]th !8 u B440 B i !s8CTan/I BAM[B bc^gX ,XFS4

Reference 10

Resolution
verified fuzzy
raw_fallback, observed 2026-08-14T12:45:40.805807Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=arxiv_source observed=2026-08-14T12:45:40.680600Z digest=sha256:21cef92353274e478f26049c7d00575619c0e3212b4e5410f4ea440fb6f79349

Pith citing papers

No inbound Pith citation observations are available.