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An Embedded Iris Recognition System Optimization using Dynamically ReconfigurableDecoder with LDPC Codes

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arxiv 2107.03688 v1 pith:RPD6ROHY submitted 2021-07-08 cs.CV

classification cs.CV
keywords irisqc-ldpcrecognitiondecoderapplicationscodesembeddedmulti-mode
verification ladder T0 review T1 audit T2 compute T3 formal
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Extracting and analyzing iris textures for biometric recognition has been extensively studied. As the transition of iris recognition from lab technology to nation-scale applications, most systems are facing high complexity in either time or space, leading to unfitness for embedded devices. In this paper, the proposed design includes a minimal set of computer vision modules and multi-mode QC-LDPC decoder which can alleviate variability and noise caused by iris acquisition and follow-up process. Several classes of QC-LDPC code from IEEE 802.16 are tested for the validity of accuracy improvement. Some of the codes mentioned above are used for further QC-LDPC decoder quantization, validation and comparison to each other. We show that we can apply Dynamic Partial Reconfiguration technology to implement the multi-mode QC-LDPC decoder for the iris recognition system. The results show that the implementation is power-efficient and good for edge applications.

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