A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator | Paper Citation Record

Observation f0a1a972-4fcf-4bb4-853f-e8583aa91104 · outbound

This paper cites Towards high-quality and efficient video super-resolution via spatial- temporal data overfitting,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Towards high-quality and efficient video super-resolution via spatial- temporal data overfitting,

Reference 1

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Observation 342b086c-e9b5-484c-aef3-8ee9afe53f22 · outbound

This paper cites Deep neural networks for acoustic modeling in speech recognition: The shared views of four research groups,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Deep neural networks for acoustic modeling in speech recognition: The shared views of four research groups,

Reference 2

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Observation 0ccf26ce-f28e-41fe-aaf5-cea5b197954f · outbound

This paper cites Quantifying the knowledge in a DNN to explain knowledge distillation for classification,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Quantifying the knowledge in a DNN to explain knowledge distillation for classification,

Reference 3

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Observation 216c2418-6780-4b18-a848-7172afe40b9b · outbound

This paper cites A 28-nm 64-kb 31.6-TFLOPS/W digital-domain floating-point-computing-unit and double-bit 6T-SRAM computing-in-memory macro for floating-point CNNs,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 28-nm 64-kb 31.6-TFLOPS/W digital-domain floating-point-computing-unit and double-bit 6T-SRAM computing-in-memory macro for floating-point CNNs,

Reference 4

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Observation c04d7614-aa77-47e5-924c-9e8dcaea5334 · outbound

This paper cites A 28-nm 50.1-TOPS/W P-8T SRAM compute-in-memory macro design with BL charge-sharing-based in- SRAM DAC/ADC operations,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 28-nm 50.1-TOPS/W P-8T SRAM compute-in-memory macro design with BL charge-sharing-based in- SRAM DAC/ADC operations,

Reference 5

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 48b22e30-1b91-4316-9212-c3aaf4f29fd0 · outbound

This paper cites Eyeriss v2: A flexible accelerator for emerging deep neural networks on mobile devices,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Eyeriss v2: A flexible accelerator for emerging deep neural networks on mobile devices,

Reference 6

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Observation eaf3d788-d76f-4468-a14a-98d5bf28c46b · outbound

This paper cites Efficient nonlinear function ap- proximation in analog resistive crossbars for recurrent neural networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Efficient nonlinear function ap- proximation in analog resistive crossbars for recurrent neural networks,

Reference 7

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation db6cecee-4386-4b0e-9520-184f0a926619 · outbound

This paper cites A 2941-TOPS/W charge-domain 10T SRAM compute-in-memory for ternary neural network,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 2941-TOPS/W charge-domain 10T SRAM compute-in-memory for ternary neural network,

Reference 8

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 41e77122-1914-438f-b45d-a27f903a37ab · outbound

This paper cites 34.3 a 22nm 64kb lightning-like hybrid computing-in-memory macro with a compressed adder tree and analog- storage quantizers for transformer and cnns,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator 34.3 a 22nm 64kb lightning-like hybrid computing-in-memory macro with a compressed adder tree and analog- storage quantizers for transformer and cnns,

Reference 9

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Observation 15713075-2d8f-4e2e-a38c-f5f054c2ff23 · outbound

This paper cites A 22 nm 10.03-237.99 TOPS/W time-digital-hybrid SRAM compute-in-memory AI accelerator for GNN edge device applications,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 22 nm 10.03-237.99 TOPS/W time-digital-hybrid SRAM compute-in-memory AI accelerator for GNN edge device applications,

Reference 10

Resolution: malformed identifier; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 04b4d926-1709-4052-8bbf-8056f3315cc1 · outbound

This paper cites A twin-8T SRAM computation-in- memory unit-macro for multibit CNN-based AI edge processors,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A twin-8T SRAM computation-in- memory unit-macro for multibit CNN-based AI edge processors,

Reference 11

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 9c40125a-6477-4505-85f1-e26e4ba9fa2c · outbound

This paper cites A 33.6–136.2-TOPS/W Nonlinear Analog Computing-in-Memory Macro for Multi-Bit LSTM Accelerator in 65-nm CMOS,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 33.6–136.2-TOPS/W Nonlinear Analog Computing-in-Memory Macro for Multi-Bit LSTM Accelerator in 65-nm CMOS,

Reference 12

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Observation 3530da20-4602-4ad4-8bb4-bf8d7e7eebd9 · outbound

This paper cites An overview of computing-in-memory circuits with DRAM and NVM,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator An overview of computing-in-memory circuits with DRAM and NVM,

Reference 14

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Observation 116da3a3-9793-48ad-9162-d4393a7af9bb · outbound

This paper cites In-memory computation of a machine-learning classifier in a standard 6T SRAM array,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator In-memory computation of a machine-learning classifier in a standard 6T SRAM array,

Reference 15

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 65699fea-0a94-4998-8041-79fd379813c4 · outbound

This paper cites Macc-sram: A multistep accumu- lation capacitor-coupling in-memory computing sram macro for deep convolutional neural networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Macc-sram: A multistep accumu- lation capacitor-coupling in-memory computing sram macro for deep convolutional neural networks,

Reference 16

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation d411a8d8-3c43-4d09-b00f-f1622911e1a4 · outbound

This paper cites a 65nm 3T dynamic analog RAM- based computing-in-memory macro and CNN accelerator with retention enhancement, adaptive analog sparsity and 44TOPS/W system energy efficiency,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator a 65nm 3T dynamic analog RAM- based computing-in-memory macro and CNN accelerator with retention enhancement, adaptive analog sparsity and 44TOPS/W system energy efficiency,

Reference 17

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Observation a8075845-ec47-400b-8d80-4da5df64edb0 · outbound

This paper cites An overview of processing-in-memory circuits for artificial intelligence and machine learning,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator An overview of processing-in-memory circuits for artificial intelligence and machine learning,

Reference 18

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Observation a1890eec-f24a-49f6-934c-4432e2287d58 · outbound

This paper cites SRAM-based in-memory computing macro featuring voltage-mode accumulator and row-by-row ADC for processing neural networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator SRAM-based in-memory computing macro featuring voltage-mode accumulator and row-by-row ADC for processing neural networks,

Reference 19

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Observation 8291ae2d-625c-43e5-a1d3-69783db868a9 · outbound

This paper cites A 64-tile 2.4- Mb in-memory-computing CNN accelerator employing charge-domain compute,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 64-tile 2.4- Mb in-memory-computing CNN accelerator employing charge-domain compute,

Reference 20

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 5b72d992-eec7-40e9-84d6-42f378d056c7 · outbound

This paper cites A 65-nm 8T SRAM compute-in-memory macro with column ADCs for processing neural networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 65-nm 8T SRAM compute-in-memory macro with column ADCs for processing neural networks,

Reference 21

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation e4ca5b99-d332-4e94-ae51-2699639c280c · outbound

This paper cites Neuro-CIM: ADC-less neuromorphic computing-in-memory processor with operation gating/stopping and digital–analog networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Neuro-CIM: ADC-less neuromorphic computing-in-memory processor with operation gating/stopping and digital–analog networks,

Reference 22

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 77d2066a-f9b4-4dd9-85e5-1da22142972f · outbound

This paper cites High Energy-efficiency and Low latency In-Memory Computing using Analog Accumulator and In-Memory ADC with shared References,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator High Energy-efficiency and Low latency In-Memory Computing using Analog Accumulator and In-Memory ADC with shared References,

Reference 23

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Observation 0d51e95a-0f14-4305-bfb0-574d8029086e · outbound

This paper cites A 1-16b reconfig- urable 80Kb 7T SRAM-based digital near-memory computing macro for processing neural networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 1-16b reconfig- urable 80Kb 7T SRAM-based digital near-memory computing macro for processing neural networks,

Reference 24

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Observation 665f63bf-9c9f-44ba-8e24-b26da0fe9ad7 · outbound

This paper cites SRAM with In-Memory Inference and 90% Bitline Activity Reduction for Always-On Sensing with 109 TOPS/mm 2 and 749-1,459 TOPS/W in 28nm,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator SRAM with In-Memory Inference and 90% Bitline Activity Reduction for Always-On Sensing with 109 TOPS/mm 2 and 749-1,459 TOPS/W in 28nm,

Reference 25

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 1448454a-c74f-4b4c-a498-d7c1ec45e003 · outbound

This paper cites Process-Variation-Aware In-Memory Computation With Improved Linearity Using On-Chip Configurable Current-Steering Thermometric DAC,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Process-Variation-Aware In-Memory Computation With Improved Linearity Using On-Chip Configurable Current-Steering Thermometric DAC,

Reference 26

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation ea1213ee-4d02-472b-a2a8-d825d66e9273 · outbound

This paper cites Impact of aging and process variability on SRAM-based in-memory computing architectures,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Impact of aging and process variability on SRAM-based in-memory computing architectures,

Reference 27

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 80185a82-30d6-4779-a4f5-534999b7bb50 · outbound

This paper cites A Dual 7T SRAM-Based Zero-Skipping Compute-In-Memory Macro With 1-6b Binary Searching ADCs for Processing Quantized Neural Networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A Dual 7T SRAM-Based Zero-Skipping Compute-In-Memory Macro With 1-6b Binary Searching ADCs for Processing Quantized Neural Networks,

Reference 28

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 3af03a61-95fa-4b0f-820a-c88fda563e37 · outbound

This paper cites 34.9 a flash-SRAM-ADC-fused plastic computing-in- memory macro for learning in neural networks in a standard 14nm FinFET process,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator 34.9 a flash-SRAM-ADC-fused plastic computing-in- memory macro for learning in neural networks in a standard 14nm FinFET process,

Reference 29

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 3ef77791-f5f5-4724-8fa5-72efd39ee86d · outbound

This paper cites Topkima-Former: Low-Energy, Low-Latency Inference for Transformers Using Top-k In-Memory ADC,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Topkima-Former: Low-Energy, Low-Latency Inference for Transformers Using Top-k In-Memory ADC,

Reference 30

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation b3db8f37-c25a-4adf-88ea-da45cf7590bc · outbound

This paper cites Hybrid SRAM/ROM Compute-in-Memory Architecture for High Task-Level Energy Efficiency in Transformer Models With 8928-kb/mm 2 Density in 28nm CMOS,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Hybrid SRAM/ROM Compute-in-Memory Architecture for High Task-Level Energy Efficiency in Transformer Models With 8928-kb/mm 2 Density in 28nm CMOS,

Reference 31

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation b0f49539-9d14-4d94-a01d-781262f02995 · outbound

This paper cites Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm 2 Density in 65-nm CMOS,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm 2 Density in 65-nm CMOS,

Reference 32

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 0e1bff73-55e9-48ef-88f4-f814f7742090 · outbound

This paper cites A charge domain SRAM compute-in-memory macro with C-2C ladder- based 8-bit MAC unit in 22-nm FinFET process for edge inference,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A charge domain SRAM compute-in-memory macro with C-2C ladder- based 8-bit MAC unit in 22-nm FinFET process for edge inference,

Reference 33

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation cc1c5ca9-84fc-4ab0-8230-ac087e53a43d · outbound

This paper cites In-memory computing in emerging memory technologies for machine learning: An overview,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator In-memory computing in emerging memory technologies for machine learning: An overview,

Reference 34

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 493aaeab-2a15-4c08-b98d-09f367002f94 · outbound

This paper cites A charge-sharing based 8T SRAM In-Memory Computing for edge DNN acceleration,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A charge-sharing based 8T SRAM In-Memory Computing for edge DNN acceleration,

Reference 35

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation a1af6935-c083-4c78-a84e-e1ce070bbf06 · outbound

This paper cites C3SRAM: An in-memory- computing SRAM macro based on robust capacitive coupling computing mechanism,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator C3SRAM: An in-memory- computing SRAM macro based on robust capacitive coupling computing mechanism,

Reference 36

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation efb0927a-1f94-4278-96d7-5bd0818751f3 · outbound

This paper cites Cadc: Crossbar- aware dendritic convolution for efficient in-memory computing,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Cadc: Crossbar- aware dendritic convolution for efficient in-memory computing,

Reference 37

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation dc249891-2892-4623-93a5-c6e012d0e3ae · outbound

This paper cites A 351 TOPS/W and 372.4 GOPS compute-in-memory SRAM macro in 7nm FinFET CMOS for machine- learning applications,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 351 TOPS/W and 372.4 GOPS compute-in-memory SRAM macro in 7nm FinFET CMOS for machine- learning applications,

Reference 38

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation f06064d4-4dae-471e-b842-a5d37aaee95e · outbound

This paper cites A 42 pJ/decision 3.12 TOPS/W robust in-memory machine learning classifier with on-chip training,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 42 pJ/decision 3.12 TOPS/W robust in-memory machine learning classifier with on-chip training,

Reference 39

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation ddd1bbd5-2888-4f58-a46c-50ebf4ea9200 · outbound

This paper cites Challenges and trends of SRAM-based computing-in-memory for AI edge devices,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Challenges and trends of SRAM-based computing-in-memory for AI edge devices,

Reference 40

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 6eb432b6-0f07-4425-a3bb-56cf0e52f4e9 · outbound

This paper cites Ternary Weight Networks.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Ternary Weight Networks

Reference 41

Resolution: verified exact; arxiv_id, observed 2026-06-28T20:52:37.885224Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

Observation dad2b268-2ea9-4d40-87c3-601e8f5ea607 · outbound

This paper cites Mitigating methodology of hardware non-ideal characteristics for non-volatile memory based neural networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Mitigating methodology of hardware non-ideal characteristics for non-volatile memory based neural networks,

Reference 42

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation f8ae502f-4fbf-4dfd-8eef-decdf72eddd7 · outbound

This paper cites XNOR-SRAM: In-memory computing SRAM macro for binary/ternary deep neural networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator XNOR-SRAM: In-memory computing SRAM macro for binary/ternary deep neural networks,

Reference 43

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 48e5f078-8ff5-4c57-aaae-1249a0a480df · outbound

This paper cites A backpropagation with gradient accumulation algorithm capable of tolerating memristor non-idealities for training memristive neural networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A backpropagation with gradient accumulation algorithm capable of tolerating memristor non-idealities for training memristive neural networks,

Reference 44

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 902cec34-d4bf-45e1-b4e6-02ff7918ba0b · outbound

This paper cites E and Holberg, D.,CMOS Analog Circuit Design.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator E and Holberg, D.,CMOS Analog Circuit Design

Reference 45

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 042aaa99-5ff7-41d3-be86-87efcf81e3e2 · outbound

This paper cites Pseudo asynchronous level crossing ADC for ECG signal acquisition,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Pseudo asynchronous level crossing ADC for ECG signal acquisition,

Reference 46

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation cbd20d15-9f71-4877-8216-f2143ff88ec0 · outbound

This paper cites Graph attention networks,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Graph attention networks,

Reference 47

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 3dcea7d0-af9d-44c8-8618-c4c780956eef · outbound

This paper cites A 40nm analog-input ADC- free compute-in-memory RRAM macro with pulse-width modulation between sub-arrays,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 40nm analog-input ADC- free compute-in-memory RRAM macro with pulse-width modulation between sub-arrays,

Reference 48

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation 468a890c-91a8-4086-ad76-18181fb9c537 · outbound

This paper cites An Image is Worth 16x16 Words: Transformers for Image Recognition at Scale.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator An Image is Worth 16x16 Words: Transformers for Image Recognition at Scale

Reference 49

Resolution: verified exact; local_arxiv, observed 2026-06-28T20:52:37.887690Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.

Observation 0903a7d9-14af-4f7b-ac5e-9441b1dffc5d · outbound

This paper cites Rethinking the inception architecture for computer vision,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Rethinking the inception architecture for computer vision,

Reference 50

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

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Observation a205d5e3-9f0c-476b-ad5b-88ba1d65c7c0 · outbound

This paper cites Benchmarking monolithic 3D integration for compute-in- memory accelerators: overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator Benchmarking monolithic 3D integration for compute-in- memory accelerators: overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond,

Reference 51

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b2fd02ab-5e83-4894-9160-4f274b42ba13 · outbound

This paper cites ENNA: An efficient neural network accelerator design based on ADC-free compute-in-memory subarrays,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator ENNA: An efficient neural network accelerator design based on ADC-free compute-in-memory subarrays,

Reference 52

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 4a1d1881-882e-4da9-8a55-aeb766c76589 · outbound

This paper cites NeuC-CIM: A 1.3 pJ/SOP Neuromorphic Charge-Domain Compute-in-Memory Macro for Spiking Neural Net- work,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator NeuC-CIM: A 1.3 pJ/SOP Neuromorphic Charge-Domain Compute-in-Memory Macro for Spiking Neural Net- work,

Reference 53

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 69e218bc-da88-4b44-bfc8-d672461d913e · outbound

This paper cites A 5.1 pJ/neuron 127.3 us/inference RNN- based speech recognition processor using 16 computing-in-memory SRAM macros in 65nm CMOS,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 5.1 pJ/neuron 127.3 us/inference RNN- based speech recognition processor using 16 computing-in-memory SRAM macros in 65nm CMOS,

Reference 54

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ccc498e6-703d-4a5b-9d5d-efbc1ccec414 · outbound

This paper cites DNN+ NeuroSim V2. 0: An end-to-end benchmarking framework for compute-in-memory accelerators for on-chip training,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator DNN+ NeuroSim V2. 0: An end-to-end benchmarking framework for compute-in-memory accelerators for on-chip training,

Reference 55

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 134a50a0-2a09-40a1-9ef9-ae31dd668689 · outbound

This paper cites ISAAC: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator ISAAC: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars,

Reference 56

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 473489f5-e085-425c-bc11-807c8938a216 · outbound

This paper cites PUMA: A programmable ultra-efficient memristor-based accelerator for machine learning inference,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator PUMA: A programmable ultra-efficient memristor-based accelerator for machine learning inference,

Reference 57

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 649b1d39-4d05-4091-aeb3-9335b52dc108 · outbound

This paper cites FPSA: A full system stack solution for reconfigurable ReRAM- based NN accelerator architecture,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator FPSA: A full system stack solution for reconfigurable ReRAM- based NN accelerator architecture,

Reference 58

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 01cef271-6f95-4c2e-b23a-78a6871ba999 · outbound

This paper cites A 40-nm MLC-RRAM compute-in-memory macro with sparsity control, on-chip write-verify, and temperature-independent ADC references,.

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator A 40-nm MLC-RRAM compute-in-memory macro with sparsity control, on-chip write-verify, and temperature-independent ADC references,

Reference 59

Resolution: unresolved; no resolver link, observed 2026-06-28T20:44:49.356774Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

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