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Robust Clock Skew and Offset Estimation for IEEE 1588 in the Presence of Unexpected Deterministic Path Delay Asymmetries

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arxiv 2002.10858 v1 pith:TCE5S4GA submitted 2020-02-25 eess.SP

Robust Clock Skew and Offset Estimation for IEEE 1588 in the Presence of Unexpected Deterministic Path Delay Asymmetries

classification eess.SP
keywords estimationclockoffsetskewdelaysieeepathrandom
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IEEE 1588, built on the classical two-way message exchange scheme, is a popular clock synchronization protocol for packet-switched networks. Due to the presence of random queuing delays in a packet-switched network, the joint recovery of the clock skew and offset from the timestamps of the exchanged synchronization packets can be treated as a statistical estimation problem. In this paper, we address the problem of clock skew and offset estimation for IEEE 1588 in the presence of possible unknown asymmetries between the {\color{black} deterministic path delays} of the forward master-to-slave path and reverse slave-to-master path, which can result from incorrect modeling or cyber-attacks. First, we develop lower bounds on the mean square estimation error for a clock skew and offset estimation scheme for IEEE 1588 assuming the availability of multiple master-slave communication paths and complete knowledge of the probability density functions (pdf) describing the random queuing delays. Approximating the pdf of the random queuing delays by a mixture of Gaussian random variables, we then present a robust iterative clock skew and offset estimation scheme that employs the space alternating generalized expectation-maximization (SAGE) algorithm for learning all the unknown parameters. Numerical results indicate that the developed robust scheme exhibits a mean square estimation error close to the lower bounds.

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