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Analysis of Dynamic Linear and Non-linear Memristor Device Models for Emerging Neuromorphic Computing Hardware Design

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arxiv 1008.5117 v1 pith:TIHFV6BD submitted 2010-08-30 cond-mat.mes-hall

classification cond-mat.mes-hall
keywords computingdevicemodelsdesignmemristorarchitectureneuromorphicdevices
verification ladder T0 review T1 audit T2 compute T3 formal

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The value memristor devices offer to the neuromorphic computing hardware design community rests on the ability to provide effective device models that can enable large scale integrated computing architecture application simulations. Therefore, it is imperative to develop practical, functional device models of minimum mathematical complexity for fast, reliable, and accurate computing architecture technology design and simulation. To this end, various device models have been proposed in the literature seeking to characterize the physical electronic and time domain behavioral properties of memristor devices. In this work, we analyze some promising and practical non-quasi-static linear and non-linear memristor device models for neuromorphic circuit design and computing architecture simulation.

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