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Paper Citation Record · LEDGER

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment

As of 12 August 2026, this Paper Citation Record lists 40 of 40 outbound references and 0 inbound Pith citation observations for arXiv:2411.17198.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2411.17198 v1

Coverage vector

measured 40 of 40 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-12T12:28:03.629933Z

measured 40 of 40 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-12T06:34:41.77262+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

40 of 40 outbound references displayed

  • verified exact9
  • verified fuzzy7
  • unresolved7
  • parse uncertain0
  • malformed identifier1
  • metadata mismatch16

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 22a7f360-0727-4af9-97cf-5c294939d156 · outbound

This paper cites Dependable Multicore Architectures at Nanoscale: The View From Europe.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Dependable Multicore Architectures at Nanoscale: The View From Europe

Reference 1

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T12:28:05.639728Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.484584Z digest=sha256:1c2feae1e08be715e97f32d46fafca863f89431bb56e95cbd1bf308882e98ed0

Observation 3adf1088-f9cf-4018-8930-28b00a018d39 · outbound

This paper cites Basic mechanisms and modeling of single -event upset in digital microelectronics.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Basic mechanisms and modeling of single -event upset in digital microelectronics

Reference 2

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:05.483178Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.492405Z digest=sha256:0f7aebc8c1bec8f47790807134f8c2271ff9363e983f7d6be0ffd8a697628a87

Observation 3b7eb85e-009c-4e94-89df-49fcbec4bf6d · outbound

This paper cites Factors that impact the critical charge of memory elements,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Factors that impact the critical charge of memory elements,

Reference 3

Resolution
verified exact
doi, observed 2026-08-12T12:28:03.745791Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.496270Z digest=sha256:a6c331873f214a77ce00df7742c619006448cc5f1237683efb769177f69eea44

Observation 478f455f-2e2e-4321-bca6-4c8936922524 · outbound

This paper cites Analysis of radiation -hardening techniques for 6 T SRAMs with structured layouts.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Analysis of radiation -hardening techniques for 6 T SRAMs with structured layouts

Reference 4

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:05.415730Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.499917Z digest=sha256:3f745f0329c5e80498c792f756ed1ad76887ac39376a4025ee7efb4e2b4ed0e6

Observation ed920419-e7cb-471d-9d3d-5c8f57875b48 · outbound

This paper cites Impact of Technology Scaling on SRAM Soft Error Rates,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Impact of Technology Scaling on SRAM Soft Error Rates,

Reference 5

Resolution
unresolved
no resolver link, observed 2026-08-12T12:28:03.503779Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T12:28:03.503779Z digest=sha256:02f874672adf8cf4c67bd5df8eb4299d051bc1353c34e4aa7c28f197cf43613b

Observation 6986ee11-3b50-47c4-a4c6-5d0714dc5234 · outbound

This paper cites An 8T -SRAM for Variability Tolerance and Low -Voltage Operation in High -Performance 16 Caches,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment An 8T -SRAM for Variability Tolerance and Low -Voltage Operation in High -Performance 16 Caches,

Reference 6

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:05.236261Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.507673Z digest=sha256:44cd1f710ce54c3a8b1f997fed6204706884a035e6bd31b9a2b505f5183f1e9e

Observation db80dd9f-5816-4908-82fd-1ab430454e43 · outbound

This paper cites SRAM Alpha -SER Estimation From Word -Line Voltage Margin Measurements: Design Architecture and Exper imental Results.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment SRAM Alpha -SER Estimation From Word -Line Voltage Margin Measurements: Design Architecture and Exper imental Results

Reference 7

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:05.154921Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.511609Z digest=sha256:eebcc8b7e6280097c7f7714c3442c5322757ba5ed7f07ababb88d03d8a954d75

Observation 1c3ac8c6-9588-4896-bc4f-97179588b96a · outbound

This paper cites A Soft Error Tolerant 10T SRAM Bit -Cell With Differential Read Capability.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment A Soft Error Tolerant 10T SRAM Bit -Cell With Differential Read Capability

Reference 8

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T12:28:05.629195Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.515788Z digest=sha256:bda4646ae12176a8a2ff4564f1a21c7fcb73a9de1fbe0c2e613756c1122c1a63

Observation 29453145-a76a-4d96-88bc-11c95bf7ae10 · outbound

This paper cites Variability aware low leakage reliable SRAM cell design technique.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Variability aware low leakage reliable SRAM cell design technique

Reference 9

Resolution
verified exact
doi, observed 2026-08-12T12:28:03.735044Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.522762Z digest=sha256:dff285ea6b01659e92218e2aaad2e9dee89356a6565a70a0d92ccdead173aeaa

Observation 0ab21281-0ec3-497e-af11-60d05fcca83e · outbound

This paper cites Upset hardened memory design for submicron CMOS technology,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Upset hardened memory design for submicron CMOS technology,

Reference 10

Resolution
verified exact
doi, observed 2026-08-12T12:28:03.724207Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.526461Z digest=sha256:b5b33bb7860e75becf4d210e083f609c920f8a65477acd9381264643e81c11ed

Observation ec900bdf-0599-4455-a736-64930d68e7d6 · outbound

This paper cites Detailed 8-transistor SRAM cell analysis for improved alpha particle radiation hardening in nanometer technologies.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Detailed 8-transistor SRAM cell analysis for improved alpha particle radiation hardening in nanometer technologies

Reference 11

Resolution
verified exact
doi, observed 2026-08-12T12:28:03.713492Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.529945Z digest=sha256:cbb2aa5281b4082df5be51a8e2f43c73ced6ad4f7d9b2bb71389ededacbaa26a

Observation 5180aed4-723e-4978-bd0f-95e809521b25 · outbound

This paper cites Autran, D.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Autran, D

Reference 13

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T12:28:05.618716Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.537290Z digest=sha256:8f03a4a76c1a4fce5579510f6fbb58a5aabb5e0712e25cb37dcd9ece4ab453d7

Observation 7c691c17-5c77-4a3f-8abb-a938ee87c5b4 · outbound

This paper cites Analytical Model for Estimating Terrestrial Cosmic Ray Fluxes Nearly Anytime and Anywhere in the World: Extension of PARMA/EXPACS.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Analytical Model for Estimating Terrestrial Cosmic Ray Fluxes Nearly Anytime and Anywhere in the World: Extension of PARMA/EXPACS

Reference 14

Resolution
verified exact
doi, observed 2026-08-12T12:28:03.702284Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.540641Z digest=sha256:63299d6e08c421547aadd48743d8abd7701bedf10b2cb4620d5cc524f427ef32

Observation 936f1512-27f7-4919-bf5e-a292856e028c · outbound

This paper cites Electron -Induced Single- Event Upsets in 45 -nm and 28 -nm Bulk CMOS SRAM -Based FPGAs Operating at Nominal Voltage,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Electron -Induced Single- Event Upsets in 45 -nm and 28 -nm Bulk CMOS SRAM -Based FPGAs Operating at Nominal Voltage,

Reference 15

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:04.933182Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.544097Z digest=sha256:590a9a7f3507b15536b2b6fb2ab226ebc3d1fc3d53a5e1fbba892845882cff88

Observation 91538460-bd4d-4aaf-9e71-b822f43afe07 · outbound

This paper cites Predicting the vulnerability of memories to muon -induced SEUs with low - energy proton tests informed by Monte Carlo simulations,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Predicting the vulnerability of memories to muon -induced SEUs with low - energy proton tests informed by Monte Carlo simulations,

Reference 16

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:04.863595Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.547367Z digest=sha256:94a5af5ebf4bee1424b68f78a8ae975b670684d61cc5fb2b9a9a1a68ed97517e

Observation 6848a059-8577-4443-a04c-f6aefb51c5f2 · outbound

This paper cites Study of atmospheric muon interactions in Si nanoscale devices.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Study of atmospheric muon interactions in Si nanoscale devices

Reference 17

Resolution
malformed identifier
no resolver link, observed 2026-08-12T12:28:03.550800Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T12:28:03.550800Z digest=sha256:44ccf466672cb4c2b1047fefbf51056bd629631b5efba06b6ed6942db28a4337

Observation 6cdfeaa1-0140-4649-a8f8-9a822d23a4d8 · outbound

This paper cites Monte Carlo Evaluation of Single Event Effects in a Deep - Submicron Bulk Technology: Comparison Between Atmospheric a nd Accelerator Environment,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Monte Carlo Evaluation of Single Event Effects in a Deep - Submicron Bulk Technology: Comparison Between Atmospheric a nd Accelerator Environment,

Reference 18

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:04.796088Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.554440Z digest=sha256:d8adfa9e9c3d13f5f58e1730f432734f35f4b87fd6cacb153cfa0fc5dde52179

Observation 8e57e191-ef56-413e-a965-cc85a47f756d · outbound

This paper cites SEE Measurements and Simulations Using Mono -Energetic GeV -Energy Hadron Beams,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment SEE Measurements and Simulations Using Mono -Energetic GeV -Energy Hadron Beams,

Reference 19

Resolution
unresolved
no resolver link, observed 2026-08-12T12:28:03.557823Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T12:28:03.557823Z digest=sha256:13d8a9be4b780f357b352b248b7e791594fc27e40a0ae96f571808dad3d7e80b

Observation 944656da-1f2c-4734-b4a3-ea127c02b08f · outbound

This paper cites Impact of Thermal and Intermediate Energy Neutrons on SRAM SEE Rates in the LHC Accelerator.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Impact of Thermal and Intermediate Energy Neutrons on SRAM SEE Rates in the LHC Accelerator

Reference 20

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:04.651387Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.561398Z digest=sha256:e705838302f6b3da82d0dbc5ebb22d4a4ecfc19e8848b15aaf52ecee38f2b9a1

Observation 3d469698-c21c-4569-a437-d6f36872dff8 · outbound

This paper cites Single Event Effe ct cross section calibration and application to quasi - monoenergetic and spallation facilities.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Single Event Effe ct cross section calibration and application to quasi - monoenergetic and spallation facilities

Reference 21

Resolution
verified exact
raw_fallback, observed 2026-08-12T12:28:04.564176Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.565117Z digest=sha256:c13411ecf36b0b2650eec8964cf8b51adf3f35ca835147453a2fe1e972f4b423

Observation f0b1560f-7cd9-4938-8bba-edb5ef517be3 · outbound

This paper cites Method for measuring mixed field radiation levels relevant for SEEs at the LHC,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Method for measuring mixed field radiation levels relevant for SEEs at the LHC,

Reference 22

Resolution
unresolved
no resolver link, observed 2026-08-12T12:28:03.568556Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T12:28:03.568556Z digest=sha256:40ea2e9d9e03ce4c2106fd95d96488ffab85e899ee319976025c84fcd195fa77

Observation 2570da0e-c4f1-4711-83ca-a29d16dabef0 · outbound

This paper cites Neutron-induced 10B fission as a major source of soft errors in high density SRAMs.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Neutron-induced 10B fission as a major source of soft errors in high density SRAMs

Reference 23

Resolution
verified exact
doi, observed 2026-08-12T12:28:03.684476Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.572133Z digest=sha256:0a88ffc39e8b0cbc918b1ec0a039e9f8f45d7d828b2cb0874c9aee222e90f0ef

Observation 0fa50c54-ca6e-4c74-9dbd-b1bc87b7542f · outbound

This paper cites Contribution of Ther mal Neutrons to Soft Error Rate.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Contribution of Ther mal Neutrons to Soft Error Rate

Reference 24

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T12:28:05.608531Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.575495Z digest=sha256:c96c4a64f9e01363d07b7acada55913b8880ffb54c12e8b15708237858ebb7ed

Observation 807c27f1-f2e5-477a-ac41-d8f0a766205c · outbound

This paper cites On -line write margin estimator to monitor performance degradation in SRAM cores.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment On -line write margin estimator to monitor performance degradation in SRAM cores

Reference 25

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:04.435361Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.579141Z digest=sha256:5e377da831d4e2721f7e4bfe1b085990e8d415c0b4375cf9c1f880a96c1cc523

Observation c813fdf0-9a2a-477e-b166-426e55adfb96 · outbound

This paper cites A 65-nm Reliable 6T CMOS SRAM Cel l with Minimum Size Transistors.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment A 65-nm Reliable 6T CMOS SRAM Cel l with Minimum Size Transistors

Reference 26

Resolution
unresolved
no resolver link, observed 2026-08-12T12:28:03.582557Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T12:28:03.582557Z digest=sha256:e9e5c5f23c3628954750fc753347e0090dfb7614ecec4de134ffe09f9b484b46

Observation e89823f8-ec8d-4b8e-886e-5fda1b343301 · outbound

This paper cites Impacts of test factors on heavy ion single event multiple -cell upsets in nanometer -scale SRAM.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Impacts of test factors on heavy ion single event multiple -cell upsets in nanometer -scale SRAM

Reference 27

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T12:28:05.598081Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.586280Z digest=sha256:b69df920da556524f03bb580d33bf5fe9b57f24b722de4e1a59ff8a5af0f2598

Observation 178edf29-5d64-4677-8156-188422323cd0 · outbound

This paper cites CHARM: A Mixed Field Facility at CERN for Radiation Tests in Ground, Atmospheric, Space and Accelerator Representative Environments.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment CHARM: A Mixed Field Facility at CERN for Radiation Tests in Ground, Atmospheric, Space and Accelerator Representative Environments

Reference 28

Resolution
unresolved
no resolver link, observed 2026-08-12T12:28:03.589750Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T12:28:03.589750Z digest=sha256:1cb3feaa32cf81babfe8cc37be5a9cfa2ff7bf73d8e2d01835172fedd5cff7b2

Observation 0f804d5b-3ef9-4443-bd4c-afddaffcf99f · outbound

This paper cites FLUKA Simulations for SE E Studies of Critical LHC Underground Areas,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment FLUKA Simulations for SE E Studies of Critical LHC Underground Areas,

Reference 29

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:04.221642Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.593865Z digest=sha256:7bc259caaeee532a247cd0eaec9b9d528305c3e65c52c3ded2ca8a32a1130456

Observation 9fb5c1f5-b969-42fd-bdd5-bb1e173d2838 · outbound

This paper cites Failure map functions and accelerated mean time to failure tests: New approaches from improving. the reliability stimation in systems exposed to single event upsets,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Failure map functions and accelerated mean time to failure tests: New approaches from improving. the reliability stimation in systems exposed to single event upsets,

Reference 30

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:04.144145Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.597365Z digest=sha256:5350b0554007941f3cad1d9641489aec20fee346c5872646df799d99daf34577

Observation eccca570-011b-44d5-8ab7-d02288490224 · outbound

This paper cites Bevington and D.K.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Bevington and D.K

Reference 31

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T12:28:05.586614Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.600827Z digest=sha256:0d0eacb156cd52337b4abb3811ebd2d033c8aa11a60441f37d5aa5c0136becf6

Observation f9f9c94f-a092-412c-a73f-971bbd5e4bba · outbound

This paper cites Quantifying the Effect of Guard Rings and Guard Drains in Mitigating Charge Collection and Charge Spread.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Quantifying the Effect of Guard Rings and Guard Drains in Mitigating Charge Collection and Charge Spread

Reference 32

Resolution
unresolved
no resolver link, observed 2026-08-12T12:28:03.604425Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T12:28:03.604425Z digest=sha256:5b2aed0264d7f9c46d4f1f96a1b13ee8411f009a094619e019e3b2d533163784

Observation cacea7a3-776b-4f5a-8f5b-afd82d89dab2 · outbound

This paper cites Qualification and Characterization of SRAM Memories 18 Used as Radiation Sensors in the LHC,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Qualification and Characterization of SRAM Memories 18 Used as Radiation Sensors in the LHC,

Reference 33

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:05.005858Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.608032Z digest=sha256:9019b576064313e03f824fd8ad94bf2889585076dc33f47ab53305c4229a626c

Observation c7b5d953-1985-4a7c-9799-b3eb4f5da654 · outbound

This paper cites Soft error rate comparison of 6T and 8T SRAM ICs using mono -energetic proton and neutron irradiation sources.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Soft error rate comparison of 6T and 8T SRAM ICs using mono -energetic proton and neutron irradiation sources

Reference 34

Resolution
verified exact
doi, observed 2026-08-12T12:28:03.673103Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.611723Z digest=sha256:b84ea03d7c0fb82a6a91863873f95ceaf752e53c56a9afd0f6fab3466c06dc85

Observation ee40b685-88e5-44b6-97a1-d644c4a50de0 · outbound

This paper cites SRAM single event upset calculation and test using protons in the secondary beam in the BEPC.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment SRAM single event upset calculation and test using protons in the secondary beam in the BEPC

Reference 35

Resolution
verified fuzzy
raw_fallback, observed 2026-08-12T12:28:05.576152Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.615399Z digest=sha256:27e33093d6a84e0ad9013bc323ed06de5dc7053b2b4babea555b86ec650d7c44

Observation bb621f61-77de-4e1a-9ae5-58479a747b75 · outbound

This paper cites A commercial 65nm CMOS technology for space applications: Heavy ion, proton and gamma test results and modeling.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment A commercial 65nm CMOS technology for space applications: Heavy ion, proton and gamma test results and modeling

Reference 36

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:03.988154Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.618872Z digest=sha256:94f93dcf64ff5bd85b132003b04433a018b95a3f81896e7d1bad8b947f5281ea

Observation 5d2da97e-7ea6-4e40-92f4-5f8031ea4f88 · outbound

This paper cites Low Energy Proton Single - Event-Upset Test Results on 65 nm SOI SRAM.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Low Energy Proton Single - Event-Upset Test Results on 65 nm SOI SRAM

Reference 37

Resolution
unresolved
no resolver link, observed 2026-08-12T12:28:03.622573Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-12T12:28:03.622573Z digest=sha256:0b2ca83041209212fc206445efad92eb3773a8e38d801f895a8c453630ddbebb

Observation e4332a7d-40f2-46b6-9caa-261fdf249ba1 · outbound

This paper cites Heavy ion and proton -induced single event multiple upset,.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Heavy ion and proton -induced single event multiple upset,

Reference 38

Resolution
verified exact
doi, observed 2026-08-12T12:28:03.661587Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.626356Z digest=sha256:d295d723aa2d3f37f32512d6539dc9e462a31438e75e8d1e0e484ec6ba5d136e

Observation dd20c3ab-0a56-412d-b44e-8bd1f75e6d9c · outbound

This paper cites Investigation of neutron and proton SEU cross-sections on SRAMs between a few MeV and 50 MeV.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Investigation of neutron and proton SEU cross-sections on SRAMs between a few MeV and 50 MeV

Reference 39

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:03.815361Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.629933Z digest=sha256:2ce53adf14ad9176044129b195578c89b8a3918f4af6a936b2d725abbee367d3

Observation 8c32bd39-4a77-4730-a7f5-88e8c837c047 · outbound

This paper cites an unresolved cited work.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Unresolved cited work

Reference 2009

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:05.072096Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.519252Z digest=sha256:cdc7f325d33edd92a7a77bae3ade158e0aa7cade38ebf0a8214a0cbce248ab92

Observation babdc3b2-7a4a-4450-a7ba-e21d8011c669 · outbound

This paper cites an unresolved cited work.

Single Event Upsets characterization of 65 nm CMOS 6T and 8T SRAM cells for ground level environment Unresolved cited work

Reference 2015

Resolution
metadata mismatch
raw_fallback, observed 2026-08-12T12:28:05.565413Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

source=pdf_text observed=2026-08-12T12:28:03.488745Z digest=sha256:b2b724b29c722026ba6e0aa1209970b503daee360ff3b0efc4c1d33d23a5d029

Pith citing papers

No inbound Pith citation observations are available.