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arxiv: 2606.21328 · v1 · pith:VF5FNAVUnew · submitted 2026-06-19 · 💻 cs.GT

OPC UA Shared-Memory: Conceptual Elaboration and Prototypical Implementation Using Iceoryx2

Thomas Barth , Tatjana Legler , Achim Wagner , Martin Ruskowski This is my paper

Pith reviewed 2026-06-26 12:54 UTC · model grok-4.3

classification 💻 cs.GT
keywords OPC UAshared memoryIceoryx2latency measurementmicroservicesedge devicesautomation middlewareintra-host communication
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The pith

Shared memory transport for OPC UA reduces intra-host communication latencies compared to TCP.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper elaborates a concept for adapting the OPC UA communication model to use shared memory as a transport layer, enabling optimized data exchange between co-located applications on the same edge device. This targets the latency and determinism demands that arise when traditional operational technology software and modern IT applications share hardware in virtualized microservice setups. A prototype modifies an OPC UA library to integrate Iceoryx2 and measures user-level function call latencies against the standard TCP implementation. If the approach holds, it would allow standardized semantic models to operate with lower overhead in mixed OT-IT environments without requiring separate middleware.

Core claim

The central claim is that extending OPC UA with shared-memory transport, implemented prototypically via a modified library and Iceoryx2, delivers consistently lower function call latencies than the TCP-based version while preserving the OPC UA information model for microservice-based automation applications.

What carries the argument

Shared-memory transport mechanism for OPC UA, realized through integration with Iceoryx2, which bypasses network stack processing for direct memory access between processes on the same host.

If this is right

  • Co-located OT and IT applications can exchange data with reduced overhead while retaining OPC UA semantic models.
  • Microservice architectures in automation become feasible on shared edge hardware without sacrificing determinism.
  • Intra-host communication latencies drop enough to support tighter interaction between heterogeneous applications.
  • Implementation constraints in the current prototype leave room for further latency reductions through additional tuning.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same shared-memory pattern might extend to other industrial protocols that currently rely on TCP for local communication.
  • Hybrid setups could route inter-host traffic over TCP while using shared memory only for same-host pairs, improving overall system efficiency.
  • Real-time control loops in industrial settings could shorten cycle times if the latency reduction scales to higher message rates.

Load-bearing premise

The observed latency differences arise from the shared-memory transport itself rather than from changes made to the OPC UA library or from the specific way Iceoryx2 was integrated.

What would settle it

An independent benchmark that compares an unmodified OPC UA stack against a shared-memory version on identical hardware and workloads, isolating whether the latency gap remains after removing the prototype modifications.

Figures

Figures reproduced from arXiv: 2606.21328 by Achim Wagner, Martin Ruskowski, Tatjana Legler, Thomas Barth.

Figure 1
Figure 1. Figure 1: Added object type and references 3 [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 3
Figure 3. Figure 3: provides an overview of the step-by-step interaction between a Provider and the SR-Server during data registra￾tion, as well as data discovery and access by a Consumer. 5 Implementation The goal of the implementation is to realize a prototype of the proposed architecture and to enable a subsequent eval￾SemanticRegistryServer Application1 Provider Server Interface 1. Register data via AddNodes and allocate … view at source ↗
Figure 2
Figure 2. Figure 2: Example of a Provider and the representation of its data on the SR-Server 4.3 Provisioning and Consumption of Registered Data To interact with data provided by a Provider, an applica￾tion acting as a Consumer first connects to the SR-Server. By browsing the address space, the Consumer can iden￾tify all registered data points as well as their corresponding Providers. Semantic information for the registered … view at source ↗
read the original abstract

The increasing virtualization of automation software leads to a growing co-location of heterogeneous applications on shared edge devices and fosters modern microservice architectures. As a result, traditional OT software and modern IT-driven higher-level automation applications are increasingly executed on the same host system, enabling improved synergy and more efficient interaction between these domains. This development imposes strict requirements on the underlying communication infrastructure, particularly regarding latency and determinism. At the same time, there is a lack of middleware solutions that address these requirements while incorporating modern concepts such as standardized semantic information models. Building on prior work, this paper further develops a previously proposed concept of extending the OPC UA communication model for microservice-based applications and suggests the use of shared-memory as a transport mechanism for optimized intra-host communication. In addition, a first prototypical implementation based on a modified OPC UA library using Iceoryx2 is presented and evaluated in a proof-of-concept study by measuring function call latencies on the user level and comparing them to the original TCP-based OPC UA implementation. The results show consistently lower latencies for the shared-memory approach, while also indicating remaining optimization potential due to current implementation constraints.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 1 minor

Summary. The manuscript elaborates a concept for extending the OPC UA communication model to microservice-based applications on shared edge devices by using shared-memory as an intra-host transport. It presents a prototypical implementation via a modified OPC UA library integrated with Iceoryx2 and reports a proof-of-concept evaluation in which user-level function-call latencies are measured and compared to the original TCP-based OPC UA implementation, claiming consistently lower latencies for the shared-memory path along with remaining optimization potential.

Significance. If the reported latency advantage can be shown to arise specifically from the shared-memory transport (rather than from unisolated changes to the library), the work would address a practical need for low-latency, deterministic intra-host communication that still preserves OPC UA semantic models. The approach combines a standardized information model with an existing zero-copy middleware (Iceoryx2), which is a concrete strength of the contribution.

major comments (2)
  1. [Abstract / Evaluation] Abstract and evaluation description: the headline claim that shared-memory yields lower latencies rests on timing comparisons performed after the OPC UA library itself was modified to incorporate the new transport. No quantitative latency values, error bars, measurement methodology, or statistical details are supplied, and no account is given of the modification delta (altered call paths, removed indirections, or Iceoryx2-specific changes). Consequently the comparison does not isolate the asserted causal factor.
  2. [Evaluation] The experimental design therefore leaves open the possibility that observed differences are artifacts of the library modifications rather than the shared-memory mechanism; without controls that hold all other factors constant, the central empirical result cannot be taken as support for the transport-level claim.
minor comments (1)
  1. [Abstract] The abstract states that results indicate 'remaining optimization potential due to current implementation constraints' but does not enumerate those constraints or quantify their impact.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive comments. We agree that the evaluation requires clarification and additional detail to better support the claims. We respond to each major comment below.

read point-by-point responses

  1. Referee: [Abstract / Evaluation] Abstract and evaluation description: the headline claim that shared-memory yields lower latencies rests on timing comparisons performed after the OPC UA library itself was modified to incorporate the new transport. No quantitative latency values, error bars, measurement methodology, or statistical details are supplied, and no account is given of the modification delta (altered call paths, removed indirections, or Iceoryx2-specific changes). Consequently the comparison does not isolate the asserted causal factor.

    Authors: We agree that the manuscript does not supply quantitative latency values, error bars, measurement methodology, statistical details, or a breakdown of the library modification delta. In revision we will add these elements to the evaluation section, including a description of altered call paths, removed indirections, and Iceoryx2-specific changes, so that the comparison can be assessed more precisely. revision: yes

  2. Referee: [Evaluation] The experimental design therefore leaves open the possibility that observed differences are artifacts of the library modifications rather than the shared-memory mechanism; without controls that hold all other factors constant, the central empirical result cannot be taken as support for the transport-level claim.

    Authors: We acknowledge that the current design does not include explicit controls holding all other factors constant, leaving open the possibility that differences arise from library modifications. We will revise the manuscript to discuss this limitation explicitly, clarify the proof-of-concept scope, and add any feasible comparative analysis or controls that can be implemented without new experiments. revision: partial

Circularity Check

0 steps flagged

No circularity: empirical implementation study with direct measurements

full rationale

The paper is a conceptual elaboration plus prototypical implementation and latency measurement study. No equations, parameter fitting, derivations, or self-referential constructions appear in the provided abstract or description. The central claim rests on timing comparisons between the modified shared-memory path and the original TCP implementation; these are external empirical observations rather than quantities defined in terms of themselves or forced by self-citation. Building on prior work is noted but does not reduce the reported results to a self-citation chain or ansatz. This matches the default expectation of a self-contained implementation paper.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

The central claim rests on the domain assumption that shared-memory IPC is lower-latency than TCP for intra-host traffic and that the prototype modifications preserve functional equivalence to standard OPC UA.

axioms (1)
  • domain assumption Shared memory provides inherently lower latency than TCP sockets for data exchange between processes on the same host
    Invoked to justify the choice of transport mechanism and to interpret the measured latency reduction.

pith-pipeline@v0.9.1-grok · 5736 in / 1211 out tokens · 28920 ms · 2026-06-26T12:54:13.854499+00:00 · methodology

discussion (0)

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