Compiling universal quantum circuits

A. Mandilara; Rahul P. Singh

REVIEW 3 major objections 4 minor 29 references

Compiling universal quantum circuits

T0 review · 3 major / 4 minor · reviewed 2026-08-14 · deepseek-v4-flash

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Pith's one-line read Fixed circuit architectures can compile arbitrary unitaries by tuning only single-qubit gate angles; for 3, 4, and 5 qubits the paper reports universal circuits with 16, 64, and 256 CNOTs.

desk verdict The 3-qubit result may be real, but the 4- and 5-qubit universal-circuit claims are dimensionally impossible: the stated circuits have fewer tunable angles than the dimension of the unitary group. read the letter →

arxiv 1908.03994 v3 pith:X3ADZVXL submitted 2019-08-12 quant-ph

Rahul P. Singh , A. Mandilara This is my paper · ORCID

classification quant-ph

keywords quantumcompilinguniversalcircuitsCNOTcountcircuitsynthesisgradientdescentrootofidentitycontrolgatedecomposition

verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper aims to establish a compiling method that can certify a fixed quantum circuit architecture as universal and then use it to reach any n-qubit operation, by tuning only the angles inside single-qubit gates. The central claim is that a circuit built from $2^n$ identical units can compile arbitrary unitaries once a single unit is tuned so its spectrum is an $N$-th root of identity, and that gradient descent can then walk from this starting point to any target. As an application, the authors identify universal circuits for 3, 4, and 5 qubits containing 16, 64, and 256 CNOTs respectively, close to the theoretical minima of 14, 61, and 252. If correct, this gives short, fixed-structure circuits for quantum simulation and small-scale quantum technology that do not require a fresh decomposition for each target gate.

What carries the argument

The load-bearing object is the $N$-th root of identity: an $n$-qubit unitary whose eigenvalues are exactly the $N=2^n$ complex roots of unity. The method finds such a configuration for one circuit unit by minimizing $\sum_{j=1}^{N-1}|\lambda_j(\vec\phi)|$, the summed magnitudes of the non-leading coefficients of the unit's characteristic polynomial; this cost vanishes exactly when the spectrum sits on the roots of unity. Repeating the tuned unit $N$ times produces a non-trivial identity for the whole circuit, the symmetry-breaking starting point. The second phase defines intermediate targets $U_t^{(j,M)}=\exp(i\sqrt{j/M}\,\hat H_t)$ from the target's generator and applies successive gradient descents, measuring progress with the distance $D=1-\left|\operatorname{tr}(U_t \tilde U_t^\dagger)\right|^2/4^n$.

What would settle it

Pick one reported architecture, say the 3-qubit 16-CNOT circuit, and run its compiling procedure on many random target unitaries drawn uniformly from the full unitary group, demanding final distance below $10^{-8}$. A single non-converging generic target would refute the claim; so would a Lie-algebra rank check showing that the reachable algebra is smaller than $\mathfrak{su}(8)$.

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Extended reading notes

Core claim

The paper's central claim is that universality of a circuit architecture can be engineered from below: rather than decomposing a target unitary, one first tunes a single repeated unit to have an $N$-th root-of-identity spectrum, repeats it $N$ times to form a non-trivial identity, and then breaks the symmetry by gradient descent through fractional powers of the target unitary. The authors report that this procedure succeeds for 3, 4, and 5 qubits using circuit units whose CNOT count saturates the lower-bound formula, giving total circuits of 16, 64, and 256 CNOTs. They also report that the convergence of the gradient descent is exponentially fast in the number of steps, so the final accuracy can be made arbitrarily high, and that not every qubit-connectivity layout with the minimum unit size is universal.

Load-bearing premise

The universality of each reported circuit is certified only by watching gradient descent converge exponentially on a few random targets close to the identity; there is no proof that this local, sampled behavior guarantees every possible target is reachable.

Editorial extensions

If this is right

If the claim is right, 3-, 4-, and 5-qubit universal circuits exist with 16, 64, and 256 CNOTs, only 2, 3, and 4 CNOTs above the theoretical lower bounds.
Because accuracy grows exponentially with the number of gradient steps, the same fixed architecture can be reused for any target and recompiled to arbitrary precision by changing only the local angles.
The method applies to any fixed two-qubit entangling gate, so it can be used to compare how efficiently different gate types or qubit-connectivity layouts compile universality.
Connectivity is not a free choice: some layouts with the minimum number of CNOTs per unit are not universal or compile much slower, while adding a single CNOT can substantially improve compiling speed; the method doubles as a layout-filtering procedure.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

If the local convergence test is equivalent to full controllability, then the architecture search can be replaced by a finite algebraic check: compute the dimension of the Lie algebra generated by the tunable one-qubit rotations and the fixed CNOT placements, and require it to match the full unitary algebra. This is a testable extension that would remove the sample-based caveat.
The pattern in the reported counts suggests concrete scaling predictions for the next sizes: for $n=6$ the lower-bound formula gives 16 CNOTs per unit (1024 total, with a theoretical minimum of 1020), and for $n=7$ it gives 32 per unit (4096 total, against 4091). If the method scales as the paper anticipates, these are the counts to look for.

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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Desk Editor's Note

read the letter

Colleague,

You should know this one before spending an hour on it. The paper's headline claim—16, 64, and 256-CNOT universal circuits for 3, 4, and 5 qubits—fails for 4 and 5 on a parameter count taken from the authors' own equations. Their architecture has 2^n repeated units, each with N1q:uc three-angle single-qubit gates. With their stated N1q:uc = (3/2)ceil(2n/3), the total number of real parameters is 3·2^n·N1q:uc. For n=4 that is at most 240 (rounding 4.5 up to 5 gates per unit), while PSU(16) has dimension 255. For n=5 it is 576 versus 1023. A smooth image of a 576-dimensional parameter space cannot be dense in a 1023-dimensional manifold, so the claimed universal compiling for 4 and 5 qubits is impossible before any numerics, regardless of how clever the optimization is. The 3-qubit case clears the count: 72 parameters against PSU(8)'s 63.

That is the load-bearing flaw. The paper does have real content worth acknowledging. The repeated-block architecture with a root-of-unity initialization via characteristic-polynomial coefficients is a genuinely different angle on the compiling problem, and the stepwise gradient descent from the identity to the target is a sensible way to make the optimization tractable. The extension of Harel–Akulin control ideas to circuit compiling is a fair contribution. If the n=3 result is real—and it might be—it gives a 16-CNOT universal 3-qubit circuit, close to the theoretical minimum of 14, which would be a small but concrete step.

What is missing is exactly what you would need to trust the n=3 claim: no gate lists, no angle values, no circuit diagrams with actual placements, no code or data, and no statistics from the gradient runs. The universality criterion—exponential decay of the distance for "few random targets near identity"—is a heuristic, not a proof. For n=4 and n=5, though, the heuristic is moot; the dimension argument kills them.

So the paper is a mix: a promising method, a plausible 3-qubit result, and two impossible claims. As written, it should not be published. The authors should be told to drop the 4- and 5-qubit claims or rework the architecture (more single-qubit gates per unit) until the parameter count exceeds the group dimension, and to ship the actual circuits and numerics for n=3.

For you: if you are tracking quantum compiling, the n=3 circuit might be worth a look if they ever provide it. The rest is a cautionary tale about dimensional analysis.

Recommendation: it deserves a serious referee, but only to confirm the dimensional obstruction and to evaluate the n=3 evidence; the outcome is likely rejection unless the authors substantially revise.

Referee Report

3 major / 4 minor

Summary. The paper proposes a numerical method for compiling arbitrary n-qubit unitaries into circuits with a fixed 'circuit unit' repeated 2^n times. The unit contains CNOT gates in a fixed architectural pattern and single-qubit rotations with adjustable angles. The method first tunes one unit so that its spectrum is the nth roots of the identity, then repeats this unit 2^n times to form a nontrivial identity, and finally uses successive gradient-descent steps to deform this identity into a target unitary. As an application, the paper claims to have identified compiling universal circuits for 3, 4, and 5 qubits with total CNOT counts of 16, 64, and 256, respectively, close to the theoretical lower bounds of 14, 61, and 252. The manuscript contains no gate lists, parameter values, convergence statistics, or code for these claimed circuits.

Significance. If the central claims were correct, the 16-, 64-, and 256-CNOT circuits would be a substantial improvement over constructive decomposition methods such as Shende et al., and the compiling method would be a useful heuristic for moderate qubit numbers. However, the claims for 4 and 5 qubits are impossible on parameter-count grounds, as I detail below, and the 3-qubit claim rests on an unproven sample-based universality criterion without supporting numerical data. The paper therefore does not currently provide a reproducible or certifiable result, despite the appealing nature of the proposed approach.

major comments (3)

[§IV, Eqs. (1)–(3)] For n=4 and n=5 the claimed universal circuits are impossible on parameter-count grounds. With N=2^n circuit units and, as stated in Section IV, N1q:uc=(3/2)ceil(2n/3), the total number of real adjustable angles is 3·2^n·N1q:uc: 240 for n=4 and 576 for n=5. The corresponding unitary groups PSU(16) and PSU(32) have real dimensions 255 and 1023. The image of a fixed circuit architecture is a semialgebraic set of dimension at most the number of independent real angles, so this image cannot be dense in the ambient unitary group and cannot compile arbitrary unitaries. This rules out the 64- and 256-CNOT claims independently of the numerical heuristic. The 3-qubit case (72 parameters versus PSU(8) dimension 63) is not blocked by this argument.
[§III A] The universality criterion is circular and not sufficient for the claimed conclusion. A circuit is called compiling universal when gradient descent decreases the distance to 'few random target unitary operators in the neighborhood of unity' exponentially, but the paper provides no controllability proof, Lie-algebra rank condition, or convergence theorem showing that all target unitaries are reachable. Treating successful convergence on a few nearby random targets as a certification of universality defines the property by the success of the same optimizer that is used to find the circuits. The method also assumes without proof that a root-of-unity parameter configuration exists for each reported architecture; the text only states that such a solution can be identified by gradient descent, with no reported success or failure statistics.
[§IV] The central numerical claims are not supported by any explicit data. The paper gives no gate-level descriptions of the claimed 16-, 64-, and 256-CNOT circuits, no list of CNOT placements, no single-qubit angle values, no final infidelities, and no convergence statistics such as fitted decay rates gamma or numbers of gradient-descent steps. Figures 3 and 4 are schematic, and for n=4 only one unit circuit is drawn. Without this material the claims 'we identified compiling universal circuits' and the comparisons of compiling-time efficiency are not verifiable or reproducible.

minor comments (4)

[Section II] The sentence defining N1q contains a likely typo: 'N1q = 2^n N2q:uc' should presumably read 'N1q = 2^n N1q:uc', since otherwise the total single-qubit-gate count is inconsistent with the rest of the paper.
[Eq. (1)] The formula '4n − 3n − 1' should be '4^n − 3n − 1' to match the known lower bound cited from Shende, Markov, and Bullock and to reproduce the numerical values 14, 61, and 252 quoted in Section IV.
[Section IV.2] The phrase 'see for instance setting B in Fig. 3' should refer to Fig. 4, since Fig. 3 shows 3-qubit connectivity settings only.
[Section IV.3] The report on IBM QX2 and IBM QX4 architectures is not self-contained: the exact qubit-connectivity layouts used should be specified, since the architecture names alone do not determine the circuit unit.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity; the papers numerical universality claims are heuristic and potentially inconsistent, but no prediction reduces by construction to its inputs.

full rationale

The central claim that the listed architectures are compiling-universal rests on the numerical observation of exponential gradient-descent convergence toward a few random targets near identity (Section III A, Section IV). This is a heuristic extrapolation, not a circular reduction: the paper does not define 'compiling universal' as 'gradient descent succeeded'; it defines the objective as the ability to simulate arbitrary n-qubit unitaries and uses the convergence test as evidence. The CNOT counts in Section IV are not outputs of a fit; they are prescribed by Eq. (1) via N2q = 2^n ceil((4^n - 3n - 1)/2^{n+2}), and the universality of those specific architectures is then tested rather than assumed. The N-th-root construction in Step 1 is supported by a cited and locally proved equivalence between the N-th-root condition and vanishing of characteristic-polynomial coefficients, not by the conclusion. The only self-citation ([13]) appears in a list of single-qubit compiling methods and is not load-bearing; external citations [24] and [25] provide lower bounds and a control technique, neither forming a self-citation chain. The parameter-count mismatch for n=4 and n=5 (fewer adjustable angles than the dimension of PSU) and the absence of a universality proof are serious correctness risks, but they are not instances of a prediction reducing to its input by construction. A finite-sample numerical test can be weak or even fatal to the claim without being circular.

Assumptions & free parameters 2 free parameters · 5 assumptions · 0 invented entities

The paper's central claim depends on several unproven or unspecified ingredients. The root-of-unity existence and the local-to-global universality heuristic are ad hoc assumptions introduced specifically to support the method. The standard math assumptions are acceptable. No new physical entities are postulated.

free parameters (2)

M (number of intermediate unitary steps in Eq. 8)
The paper defines target unitaries U^{j/M} for j=1..M but never specifies M. The claimed exactness and the computational cost depend on this choice.
Gradient-descent hyperparameters (step size, convergence tolerance)
Not specified anywhere in the paper; required to reproduce the numerical identification of universal circuits.

assumptions (5)

ad hoc to paper For each reported architecture, there exists a parameter setting making the circuit unit a 2^n-th root of identity.
Assumed from unshown gradient-descent runs in Section III A; no explicit solutions or existence proof are given.
ad hoc to paper Exponential decrease of distance for a few random targets near unity certifies compiling universality for arbitrary targets.
Section III A states this as the efficiency check; no theorem links local convergence to global reachability.
standard math Vanishing characteristic polynomial coefficients, except leading and constant terms, is equivalent to the spectrum being the N-th roots of unity.
Section III A, Eqs. (4)-(5); standard linear algebra.
domain assumption The lower bound on CNOT count from Shende, Markov, and Bullock [24] is correct.
Used in Eq. (1) to set N2q:uc; accepted from prior literature.
standard math A generic n-qubit unitary requires 4^n - 1 real parameters, making the parameter-counting lower bound in Eq. (3) valid.
Section II; standard counting of unitary degrees of freedom.

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Pith. "Pith review of Compiling universal quantum circuits." pith.science (2026). https://pith.science/paper/X3ADZVXL

@misc{pith2026190803994,
  author       = {Pith},
  title        = {Pith review of: Compiling universal quantum circuits},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/X3ADZVXL}},
  note         = {Machine review of arXiv:1908.03994}
}

abstract

We propose a method of compiling that permits to identify quantum circuits able to simulate arbitrary $n$-qubit unitary operations via the adjustment of angles in single-qubit gates therein. The method of compiling itself extends older quantum control techniques and stays computationally tractable for several qubits. As an application we identify compiling universal circuits for $3$, $4$ and $5$ qubits consisting of $16$, $64$ and $ 256$ CNOTs respectively.

Figures

Figures reproduced from arXiv: 1908.03994 by the authors.

**Figure 1.** FIG. 1: The total circuit composed by [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗

**Figure 4.** FIG. 4: We have tested three different connectivity settings [PITH_FULL_IMAGE:figures/full_fig_p004_4.png] view at source ↗

Figures from the paper (1 more)

**Figure 3.** Figure 3: FIG. 3: Connectivity constrains between three qubits and th [PITH_FULL_IMAGE:figures/full_fig_p004_3.png]

Discussion (0). Continue with ORCID to comment.

Reference graph

Works this paper leans on

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3, and we have concluded that all three provide compiling universal circuits with N2q:uc = N min 2q:uc = 2

Three qubit circuits We have tested the three possible connectivity settings among the three qubits, see Fig. 3, and we have concluded that all three provide compiling universal circuits with N2q:uc = N min 2q:uc = 2. On the other hand the compiling- time eﬃciency of A circuit is slightly higher than the one of circuit B, while for circuit C the compiling...

work page
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Four qubit circuits For four qubits we have not performed an exhaustive search but we have seen that not every circuit unit with N2q:uc = N min 2q:uc = 4 results to a compiling universal cir- cuit, see for instance setting B in Fig. 3. The unit circuits A and C in Fig. 4 result to compiling universal circuits that have approximately the same compiling-tim...

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Pith tools

Reviewed August 14, 2026 · model on record in the stance chip above.

[1] [1]

3, and we have concluded that all three provide compiling universal circuits with N2q:uc = N min 2q:uc = 2

Three qubit circuits We have tested the three possible connectivity settings among the three qubits, see Fig. 3, and we have concluded that all three provide compiling universal circuits with N2q:uc = N min 2q:uc = 2. On the other hand the compiling- time eﬃciency of A circuit is slightly higher than the one of circuit B, while for circuit C the compiling...

work page

[2] [2]

Four qubit circuits For four qubits we have not performed an exhaustive search but we have seen that not every circuit unit with N2q:uc = N min 2q:uc = 4 results to a compiling universal cir- cuit, see for instance setting B in Fig. 3. The unit circuits A and C in Fig. 4 result to compiling universal circuits that have approximately the same compiling-tim...

work page

[3] [3]

Dissecting the collective dynamics of arrays of superconducting circuits and quantum meta- materials

Five qubit circuits For ﬁve qubits we have identiﬁed a few connectivity setting which can result in compiling universal circuits with N2q:uc = N min 2q:uc = 8. Among the examples we have studied are the IBM QX2 and IBM QX4 architectures. We found out that both architectures can provide compil- ing universal circuits with N2q = 256, with the IBM QX4 circui...

work page

[4] [4]

A. Y. Kitaev, Quantum computations: algorithms and error correction , Russ. Math. Surv. 52, 1191 (1997)

work page 1997

[5] [5]

M. A. Nielsen and I. L. Chuang, Quantum Computation and Quantum Information , (Cambridge University Press, 2000)

work page 2000

[6] [6]

A. Yu. Kitaev, A. Shen, and M. N. Vyalyi. Classical and quantum computation, 1st edition. (American Mathemat- ical Society, 2002)

work page 2002

[7] [7]

Deutsch, A

D. Deutsch, A. Barenco, and A. Ekert, Universality in Quantum Computation , Proc. R. Soc. London A 449, 669 (1995)

work page 1995

[8] [8]

A. W. Harrow, B. Recht, and I. L. Chuang, Eﬃcient Dis- crete Approximations of Quantum Gates , J. Math. Phys. 43, 4445 (2002)

work page 2002