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Paper Citation Record · LEDGER

Global Microprocessor Correctness in the Presence of Transient Execution

As of 20 August 2026, this Paper Citation Record lists 44 of 44 outbound references and 0 inbound Pith citation observations for arXiv:2506.17154.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2506.17154 v1

Coverage vector

measured 44 of 44 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-15T19:17:33.706732Z

measured 44 of 44 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-20T06:33:59.587034+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

44 of 44 outbound references displayed

  • verified exact6
  • verified fuzzy10
  • unresolved25
  • parse uncertain0
  • malformed identifier2
  • metadata mismatch1

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 8aed5e20-3d19-425f-a99a-e40308906eb8 · outbound

This paper cites Hardware Prefetcher on Intel Processors.

Global Microprocessor Correctness in the Presence of Transient Execution Hardware Prefetcher on Intel Processors

Reference 1

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.728808Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.545459Z digest=sha256:2d124b3e4cb9fd23a88426ff0873180af5fef246ea9a620c94d19a25921a3592

Observation 05a699b7-3e4a-4715-8f0a-c226a5b499bc · outbound

This paper cites CVE-2018-3639: Speculative Store Bypass.

Global Microprocessor Correctness in the Presence of Transient Execution CVE-2018-3639: Speculative Store Bypass

Reference 2

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.719016Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.549549Z digest=sha256:5ca6e3e3b6958ab8d6a6d46140d0bc17543b9f5fcb0d6a5cc1bc93d1ed4c87e6

Observation 9dfb4b58-15bd-4f0a-a031-b6bb682c2a41 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 3

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.552867Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.552867Z digest=sha256:6bdaf2037d8ceab4d01ce05b19bd19d5eb451a58a049d5155425761ad6db98be

Observation 0f1df1ac-299c-48c4-9978-11e5ba99d731 · outbound

This paper cites Wenisch, Yuval Yarom, and Raoul Strackx.

Global Microprocessor Correctness in the Presence of Transient Execution Wenisch, Yuval Yarom, and Raoul Strackx

Reference 4

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.710742Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.556540Z digest=sha256:8b45fb7174f4bd8c9d067c30cc86d458664ffbb1fdf9a4eaf81733cac3143345

Observation 1532a77a-0007-42d1-a3a9-72f823926e9c · outbound

This paper cites Finocchiaro, and Danilo Ven- draminetto.

Global Microprocessor Correctness in the Presence of Transient Execution Finocchiaro, and Danilo Ven- draminetto

Reference 5

Resolution
verified exact
doi, observed 2026-08-15T19:17:34.618458Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.567878Z digest=sha256:3ef6612fa0feafb0c183f3e2d9b8a8d67d5e9f0ff5e1ffd2ccc6a0f68e2a0363

Observation a2c26e36-ccf3-4864-91ab-5b95f6020962 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 6

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.585047Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.571873Z digest=sha256:4c567438b5a47462a44ec92a76ed760af11dd3ec8537a6044081f4164578dbda

Observation 934be2bd-074d-4b19-8d42-1b604ca031ad · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 7

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.567797Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.578980Z digest=sha256:855891d5309f4c4fa11984d83dae3b59ae277a2fc065b8917db7335897024fed

Observation b76ac9ae-ef90-4673-a0d4-212fbc871fe0 · outbound

This paper cites Dillinger, Panagiotis Manolios, and Daron Vroon.

Global Microprocessor Correctness in the Presence of Transient Execution Dillinger, Panagiotis Manolios, and Daron Vroon

Reference 8

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.558668Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.582119Z digest=sha256:44fb71a91a9a0403b007476f1a23956605eb829f890104aa2d58f175ebb180b6

Observation 95f9e878-c1c3-4c26-9152-ff8dea096716 · outbound

This paper cites 2016.Interactive Non-theorem Disproving.

Global Microprocessor Correctness in the Presence of Transient Execution 2016.Interactive Non-theorem Disproving

Reference 9

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.588995Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.588995Z digest=sha256:106fb0847cbc284f347edf13c0233d612642c82e908305b7f01810be3a89d755

Observation 8a5c96b1-37d3-4af4-b052-d07fa3063ab1 · outbound

This paper cites Dillinger, Matt Kaufmann, and Panagiotis Manolios.

Global Microprocessor Correctness in the Presence of Transient Execution Dillinger, Matt Kaufmann, and Panagiotis Manolios

Reference 10

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.593017Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.593017Z digest=sha256:427d5feb569333b29449e9b8fa421e4e1bc48085f1d541c2b0e098a5cf927564

Observation 037696d6-113d-497b-a545-fa8faae5136e · outbound

This paper cites Dillinger, and Panagiotis Manolios.

Global Microprocessor Correctness in the Presence of Transient Execution Dillinger, and Panagiotis Manolios

Reference 11

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.597020Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.597020Z digest=sha256:19a849ada27922f419af4eae6c350afe4d358ddb21f99994079331cb8905f884

Observation 1fe4c10e-7970-4e78-82aa-d9465320c7d1 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 12

Resolution
verified exact
doi, observed 2026-08-15T19:17:33.795770Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.599894Z digest=sha256:41c4684f4b7435710d4cc3b51977a05492a84b038cf35fc73aff79e44c29a0b0

Observation 46407268-8cca-4e9b-aaad-7d88bd387379 · outbound

This paper cites The ACL2 Sedan.

Global Microprocessor Correctness in the Presence of Transient Execution The ACL2 Sedan

Reference 13

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.603485Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.603485Z digest=sha256:eef48586475868183e2949dabb463cd4ca03cac09bf66d64298fe5a34c09cf87

Observation 27b0c834-c36f-415a-af7d-0df45cb250cb · outbound

This paper cites 2022.Unique Program Execution Checking: A Novel Approach for Formal Security Analysis of Hardware.

Global Microprocessor Correctness in the Presence of Transient Execution 2022.Unique Program Execution Checking: A Novel Approach for Formal Security Analysis of Hardware

Reference 14

Resolution
verified exact
doi, observed 2026-08-15T19:17:33.779468Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.606666Z digest=sha256:0559ba91593b1da8fcdf925b986d5567304acad492e03b8351a4b7063210498e

Observation 01eb92b7-85b1-4347-b0bd-30738eb07202 · outbound

This paper cites Barrett, Subhasish Mitra, and Wolfgang Kunz.

Global Microprocessor Correctness in the Presence of Transient Execution Barrett, Subhasish Mitra, and Wolfgang Kunz

Reference 15

Resolution
metadata mismatch
raw_fallback, observed 2026-08-15T19:17:34.327754Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.610807Z digest=sha256:0827e53961442e604664f8f4993a4e573dcd63eae27e4e206149e13404a72374

Observation c00a857a-8682-4b0a-a2ea-62613e93d305 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 16

Resolution
malformed identifier
raw_fallback, observed 2026-08-15T19:17:34.548078Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.614654Z digest=sha256:dc9fff4abacf1bc19ada4bdd237003a3a3ad1361fa2363a5b2e406218fed5dc1

Observation a982d5f7-c915-4b01-8b04-12e1451f1d56 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 17

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.618256Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.618256Z digest=sha256:c6854d759605136339bce7220dcb0fd4ad4d9f6da0bdc1256d3e6b95bc786eca

Observation cddb3b38-6e46-48cf-b86e-2710e4e2a0b2 · outbound

This paper cites 2011.Computer architecture: a quanti- tative approach.

Global Microprocessor Correctness in the Presence of Transient Execution 2011.Computer architecture: a quanti- tative approach

Reference 18

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.536738Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.622490Z digest=sha256:f1213859ac687ca246a64f081647bf56a3b44e4d40d01c134b2110f71d64e1b5

Observation 3f20cb36-1451-4ba3-9a2a-54ad769a4728 · outbound

This paper cites 2016.Intel ® 64 and IA-32 Architectures Optimization Reference Manual.

Global Microprocessor Correctness in the Presence of Transient Execution 2016.Intel ® 64 and IA-32 Architectures Optimization Reference Manual

Reference 19

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.526718Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.625274Z digest=sha256:00e6686458e43f680b9127176d04bd548daf452327993df07b4946e21a714676

Observation f66dd0bc-c380-4260-ac28-1fb674e5b1eb · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 20

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.516273Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.628664Z digest=sha256:30a697f4d7776a75888236fb0f0ca4ab35d20e633dbb83a4dd34c2d15700ffd5

Observation ff5182ef-2993-4583-a239-5977defd38f7 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 21

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.488825Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.632061Z digest=sha256:70288a77f8274ba95d8177188c941f2da4518cc3183bacc547c6ce7f52a7ffc6

Observation 7e75b3f9-c50e-4ca9-a6f5-964937a92087 · outbound

This paper cites 2000.Computer- Aided Reasoning: Case Studies.

Global Microprocessor Correctness in the Presence of Transient Execution 2000.Computer- Aided Reasoning: Case Studies

Reference 23

Resolution
malformed identifier
no resolver link, observed 2026-08-15T19:17:33.638727Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.638727Z digest=sha256:5a8190cded268a521aee5e12f4f30f65dfc1ba0ca027460bd58a6f8f63899c32

Observation c5717f35-96c9-48bc-8616-037ccbfe3f3e · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 24

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.417155Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.641778Z digest=sha256:9e5022f2008dc56963a5c894731233b5451a60ac1a05a8d0de6f3d8af7772259

Observation 75adc74b-f65a-4f1c-b833-6e762179d13a · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 25

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.645092Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.645092Z digest=sha256:295ada565ee057a261625a3fe8bdf2b4a9c7cb48bc2fa83e51b10e47a2739af9

Observation ec441f02-3905-4fa9-9abc-766538c4f0e3 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 26

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.648282Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.648282Z digest=sha256:758739496958a91b23c8ce7c6df4f6f9bf501505f68c07971b01684e0acb1d31

Observation 04c42b32-6ae8-4f36-ab1f-4f092ba7a992 · outbound

This paper cites Bypassing memory safety mechanisms through speculative control flow hijacks.

Global Microprocessor Correctness in the Presence of Transient Execution Bypassing memory safety mechanisms through speculative control flow hijacks

Reference 27

Resolution
verified exact
local_arxiv, observed 2026-08-15T19:17:34.190131Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.651162Z digest=sha256:1fae00d74a2895275cb7c869a67b7e63e43f24f55b92f424475c909897dc0c57

Observation 51d9574a-2961-49f5-a6f8-e67ab2736eec · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 28

Resolution
verified exact
doi, observed 2026-08-15T19:17:33.762682Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.654515Z digest=sha256:e6119e8089203c97846f988054a35d4b0d843080225c58822fb7cecc54e2ec5c

Observation 94a72313-507d-4e25-96b5-dad361d54156 · outbound

This paper cites Srinivasan, and Kushal K.

Global Microprocessor Correctness in the Presence of Transient Execution Srinivasan, and Kushal K

Reference 29

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.657701Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.657701Z digest=sha256:0ffe48fc9e1bb70a4f6fbdf6b7a87c1bf78f251e6b560c7213cd54d75c088eac

Observation 056b5758-1beb-4931-9874-f2d33f898f34 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 30

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.396701Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.661195Z digest=sha256:8e6548f9c90646be5c46f838e7273c6dfd03f594a440eee3171e40736608d49c

Observation f3c174d7-9854-4b3b-bd54-af3038e892ec · outbound

This paper cites Patterson and John L.

Global Microprocessor Correctness in the Presence of Transient Execution Patterson and John L

Reference 31

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.386198Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.664790Z digest=sha256:1cf66e4761f3cdfb672e193668a3093b6a109e808ae2b361cbd9e7aa7cedc008

Observation 278bd93e-4f90-4fe7-880e-71ae6c3467db · outbound

This paper cites This is How You Lose the Transient Execution War.

Global Microprocessor Correctness in the Presence of Transient Execution This is How You Lose the Transient Execution War

Reference 32

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.667720Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.667720Z digest=sha256:6b41c8ba95166559cadad31e78325ea65045272254a936510d1598be350c906c

Observation f742d4c2-87d1-421e-b9cb-b28d2bd034fd · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 33

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.374923Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.671530Z digest=sha256:f14cf8fcd045327e6c806b029c016e49407a3528f1a8d60a35bda5fcf260a198

Observation c4f84197-cb81-493d-9c95-a9e0f0740ec1 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 34

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.674856Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.674856Z digest=sha256:ccec545107b02911478a7c93567e2b5004179987886b61631e9a473f8c069f6d

Observation f9fd229b-e262-427e-a1e6-6163ce4879a3 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 35

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.360132Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.681576Z digest=sha256:45fa5566471582fdecc248a2a9fe8584f69f55c3220d068baced4a143b8a8758

Observation 10d51281-8af4-4661-ad5b-f5b263a1ee1e · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 36

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.351124Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.684883Z digest=sha256:73f2e28bd619ee4fa6143a5a034ed2413b26271af82004535e1daca64008744b

Observation fc29e6aa-ec49-4052-9e1e-8571e1e3a480 · outbound

This paper cites Walter, Konstantinos Athanasiou, and Panagiotis Manolios.

Global Microprocessor Correctness in the Presence of Transient Execution Walter, Konstantinos Athanasiou, and Panagiotis Manolios

Reference 37

Resolution
verified exact
doi, observed 2026-08-15T19:17:33.740198Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.692916Z digest=sha256:6acfc4c1a7c252a33188d8f346191125bb8d05d95edcac20b1a0242b5a0613bf

Observation 048ac331-6e85-4696-b0d7-1bd2251b3378 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 38

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.698641Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.698641Z digest=sha256:2524de358f94398918ae28714d5b5532a9b03c1ebd9b54c551c8ab20b21effee

Observation b24ba531-a1bd-45eb-a579-99b692c31d19 · outbound

This paper cites jump if greater than.

Global Microprocessor Correctness in the Presence of Transient Execution jump if greater than

Reference 39

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.706732Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.706732Z digest=sha256:4037e56470960ed61ff10d915aed539d54ce3c4320cf82e9cba11989894f7ccb

Observation c97e6acf-56e5-44ce-9ea6-a5ba4aa10ba8 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 1008

Resolution
unresolved
raw_fallback, observed 2026-08-15T19:17:34.668678Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.563458Z digest=sha256:cf94b54f307e4c2cae57384a9a97679a889d29277cce73f8bfb9f14368781b4a

Observation d4e6422c-7f46-4a49-bf3d-dff5001fd976 · outbound

This paper cites InTools and Algorithms for the Construction and Analysis of Systems (TACAS).

Global Microprocessor Correctness in the Presence of Transient Execution InTools and Algorithms for the Construction and Analysis of Systems (TACAS)

Reference 2011

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.585467Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.585467Z digest=sha256:27cb3149ac610822834ed72f414fee46f21c114394e8b135b8890c7f13357bf0

Observation 9ff5397f-3783-4501-8dc7-61ba1d22b5af · outbound

This paper cites In27th USENIX Security Symposium, USENIX Security 2018, William Enck and Adrienne Porter Felt (Eds.).

Global Microprocessor Correctness in the Presence of Transient Execution In27th USENIX Security Symposium, USENIX Security 2018, William Enck and Adrienne Porter Felt (Eds.)

Reference 2018

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.702425Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.560120Z digest=sha256:370fe640b69ce857f1f2b81768b02a93ce9b0db5cd355d366444a0eba0178683

Observation 41b30ae0-edde-46eb-9d53-38285138023e · outbound

This paper cites InProceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security.

Global Microprocessor Correctness in the Presence of Transient Execution InProceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security

Reference 2019

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.576254Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.575004Z digest=sha256:5fa1dbd2cdbf196e36c0374d1004dbe10e2b5dc4f53efdebddffed910965480b

Observation 76d2eba0-283c-4dee-bb37-5ce3ff10a142 · outbound

This paper cites In41th IEEE Symposium on Security and Privacy (S&P’20).

Global Microprocessor Correctness in the Presence of Transient Execution In41th IEEE Symposium on Security and Privacy (S&P’20)

Reference 2020

Resolution
verified fuzzy
raw_fallback, observed 2026-08-15T19:17:34.340228Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.

source=pdf_text observed=2026-08-15T19:17:33.687786Z digest=sha256:5d40d93f134d7b401df39a4cdde6c791c1742ff8f58b4f144bda9f59219ca41c

Observation f8d6179d-baa4-4394-a14d-3f5969205c77 · outbound

This paper cites an unresolved cited work.

Global Microprocessor Correctness in the Presence of Transient Execution Unresolved cited work

Reference 2025

Resolution
unresolved
no resolver link, observed 2026-08-15T19:17:33.678182Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-15T19:17:33.678182Z digest=sha256:0b03ef3127054c66e90ad5e1c397c57dd129d8e8ffe8deb12918c16532d49afb

Pith citing papers

No inbound Pith citation observations are available.