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REVIEW 3 major objections 5 minor 49 references

LibFHE: A Numba-Based CUDA-Python Library for Non-RNS CKKS-BGV Fully Homomorphic Encryption on GPUs

T0 review · 3 major / 5 minor · reviewed 2026-07-14 · grok-4.5

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Pith's one-line read Optimized CUDA-Python can match CPU C++ speed for original non-RNS CKKS-BGV fully homomorphic encryption while staying pure Python.

desk verdict Solid pure-Python GPU non-RNS CKKS-BGV library with real engineering work, but the headline "comparable to CPU C++" claim has no baselines. read the letter →

arxiv 2607.05920 v3 pith:YKHXVVE4 submitted 2026-07-07 cs.CR

John Chiang This is my paper · ORCID
classification cs.CR
keywords FullyHomomorphicEncryptionCKKSBGVnon-RNSCUDA-PythonNumbaNumberTheoreticTransformationGPUacceleration
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper argues that the original, non-RNS form of the CKKS-BGV fully homomorphic encryption scheme can be accelerated on GPUs from pure Python (via Numba and native CUDA-Python bindings) well enough to match the speed of highly optimized CPU C++ non-RNS libraries. Most modern libraries switched to residue-number-system (RNS) variants for hardware speed, but that choice freezes the modulus chain and loses the original scheme's flexible, continuous control of precision and scale. By keeping coefficients in a 32-bit limb (radix) format most of the time and converting only temporarily into RNS+NTT for multiplications, the authors reclaim that flexibility while still exploiting GPU parallelism. They package ciphertexts into batch tensors so many of them share a single kernel launch, and they precompute twiddle factors and conversion constants so the hot path stays lightweight. The practical payoff is a library that sits naturally inside Python AI/ML stacks, needs no fragile C++ wrappers, and still delivers usable performance for encrypted arithmetic and even bootstrapping.

What carries the argument

Hybrid limb/RNS pipeline with CipherTensor batching: coefficients live in 32-bit limbs for flexible arithmetic; they are converted in-place only for NTT-domain multiplications, then reconstructed via Garner's mixed-radix CRT, all driven from Numba JIT kernels that amortize work across multiple ciphertexts.

What would settle it

Run the same non-RNS CKKS-BGV parameter set (N=2^16, log Q=1024, same precision and slot counts) on a published CPU C++ non-RNS library and on LibFHE, then check whether amortized per-ciphertext latencies for multiply, rotate, and bootstrap are within a small constant factor of each other.

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Extended reading notes

Core claim

An optimized pure-Python CUDA implementation of the original non-RNS CKKS-BGV scheme can reach performance comparable to highly optimized CPU-based non-RNS C++ FHE libraries, while cutting implementation complexity and improving programmability for AI/ML workflows.

Load-bearing premise

That the self-reported Tesla T4 latencies under the chosen parameters already prove the library is competitive with existing CPU C++ non-RNS libraries, even though no side-by-side numbers or named baselines appear.

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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 5 minor

Summary. LibFHE is a Numba/CUDA-Python library that implements the original (non-RNS) CKKS-BGV scheme on GPUs. The authors argue that RNS-CKKS forces rigid modulus chains and 64-bit arithmetic poorly matched to GPU datapaths, while a limb-based radix representation plus temporary RNS/NTT only for multiplication restores dynamic scale control and simplifies kernel fusion. They describe a hybrid limb↔RNS pipeline (Garner reconstruction, precomputed twiddles, matrix four-step NTT, Karatsuba), a CipherTensor batch abstraction with pairwise/broadcast modes, and a HEAAN-style API. Table 1 reports absolute latencies on a Tesla T4 (N=2^16, log Q=1024, cnum=4), including amortized bootstrap ~58 s. The central claim is that this optimized CUDA-Python Non-RNS design reaches performance comparable to highly optimized CPU Non-RNS C++ libraries while improving programmability and AI/ML integration.

Significance. If the comparability claim were substantiated, the work would be a useful systems contribution: a pure-Python, wrapper-free FHE path that reclaims original-CKKS precision flexibility and lowers the barrier for encrypted ML. The hybrid representation, CipherTensor batching, and explicit Non-RNS motivation are concrete engineering ideas. The manuscript also ships a public Colab notebook and states an intent to open-source, which supports reproducibility. At present, however, the significance is limited by the absence of any named Non-RNS C++ baseline under matched parameters, so the headline claim remains unfalsifiable.

major comments (3)
  1. Abstract, §1.3 and §8 assert that optimized CUDA-Python Non-RNS implementations achieve performance comparable to highly optimized CPU-based Non-RNS C++ FHE libraries. Table 1 and §7 report only absolute Tesla T4 latencies (amortized bootstrap ~58 s, mult ~2 s) under N=2^16, log Q=1024, cnum=4. No named Non-RNS C++ baseline (original HEAAN or equivalent), no identical parameter set, and no side-by-side CPU timings appear. Without that anchor the word “comparable” is unfalsifiable; absolute numbers alone cannot establish the claim. A matched-parameter comparison (or an explicit retraction of the comparability language) is required.
  2. §7.2.1 and Table 1: bootstrapping is the dominant cost and the only full-FHE operation, yet it is reported solely as wall-clock latency with no noise-growth, precision, or correctness metrics after refresh, and no comparison to any published Non-RNS or RNS bootstrap figure under the same (log p=30, log q=40, log T=2) setting. The central “Full Homomorphic Encryption” claim therefore rests on an uncontextualized absolute number.
  3. §4.1.3 and §5.1: the hybrid limb↔RNS design is presented as the key enabler of Non-RNS flexibility, but the manuscript supplies no micro-benchmarks isolating conversion cost versus pure-RNS or pure-limb baselines, nor any measurement of the claimed “negligible bandwidth” of the in-place shared-memory transform. Without those numbers the architectural advantage remains qualitative.
minor comments (5)
  1. §1.1 and Abstract open with an unsupported claim that “there is still no indicator pointing toward a fifth-generation successor”; this rhetorical framing is unnecessary and should be removed or substantiated.
  2. Table 1 caption and §7.2.2: clarify that all times are post-JIT warm-up and that amortized figures are total/cnum, not single-ciphertext latency.
  3. §6.2.2 lists riterotate_broadcast_into as “To Be Done”; either implement it or remove the stub from the public API description.
  4. Notation for CipherTensor attributes (log p, log q, log s) is introduced late; a short parameter table early in §6 would help.
  5. Several related-work citations (Cheddar, WarpDrive, TensorFHE) are discussed only qualitatively; a short quantitative comparison table, even if only for NTT or mult, would strengthen §1.2.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: systems paper reports direct GPU latency measurements of a known non-RNS CKKS-BGV scheme; nothing is derived from fitted inputs or self-definitional equations.

full rationale

LibFHE is an engineering contribution that reimplements the original (non-RNS) CKKS-BGV scheme in Numba CUDA-Python, describes hybrid limb/RNS pipelines, NTT optimizations, and CipherTensor batching, then reports absolute wall-clock latencies on a Tesla T4 (Table 1). There are no first-principles derivations, no fitted parameters that reappear as predictions, no uniqueness theorems, and no load-bearing self-citations. The performance claim is an empirical assertion about measured times versus (unnamed) CPU Non-RNS C++ libraries; any weakness in that comparison is an evidence gap, not circularity by construction. The paper is self-contained as a systems artifact and exhibits none of the six circular patterns.

Assumptions & free parameters 5 free parameters · 5 assumptions · 2 invented entities

As a systems paper the load-bearing content is the engineering design and the measured latencies. Free parameters are the concrete cryptographic and hardware choices that fix the reported numbers. Axioms are the standard algebraic and GPU-execution facts the design rests on. The only invented entities are the library itself and its CipherTensor data structure.

free parameters (5)
  • polynomial degree N = 2^16
    Fixed at 2^16 for all reported experiments; determines both security and NTT cost.
  • ciphertext modulus bit-length log Q = 1024
    Set to 1024 bits to claim ~80-bit security; directly controls limb count and conversion cost.
  • RNS prime bit-width = 30-31 bits
    30–31-bit primes chosen for native 32-bit GPU arithmetic; free design choice that enables the hybrid path.
  • CipherTensor batch size cnum = 4
    Set to 4 for all latency numbers; amortizes kernel launch overhead.
  • scaling factor log p / log T for bootstrapping = log p=30, log T=2
    log p=30, log T=2 taken from original HEAAN; free precision knobs that affect bootstrap cost.
assumptions (5)
  • standard math Negacyclic NTT exists and is correct for primes q ≡ 1 mod 2N
    Used throughout §2.3 and §5 for all polynomial multiplications.
  • standard math Garner’s mixed-radix algorithm correctly reconstructs the unique integer from RNS residues
    Invoked for RNS-to-limb conversion in §2.5 and §5.1.4.
  • domain assumption IEEE-754 double mantissa is insufficient for large non-RNS moduli, forcing limb or RNS representation
    Stated in §2.4 and motivates the hybrid design.
  • domain assumption Numba JIT + cuda-python bindings can emit kernels whose throughput approaches hand-written CUDA C++
    Core premise of the entire Python-first approach (§1.1, §3.1).
  • ad hoc to paper In-place limb ↔ RNS conversion inside shared memory has negligible bandwidth cost relative to NTT
    Claimed in §4.1.3 without quantitative micro-benchmarks.
invented entities (2)
  • LibFHE library
    purpose: First complete pure-Python/Numba implementation of non-RNS CKKS-BGV on GPUs.
    The artifact whose performance and programmability are the paper’s contribution.
  • CipherTensor
    purpose: Batches multiple ciphertexts sharing parameters so one kernel can process them in pairwise or broadcast mode.
    Introduced in §6.1 to raise GPU occupancy; no prior literature uses this exact abstraction for non-RNS CKKS.

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Cite this review

Pith. "Pith review of LibFHE: A Numba-Based CUDA-Python Library for Non-RNS CKKS-BGV Fully Homomorphic Encryption on GPUs." pith.science (2026). https://pith.science/paper/YKHXVVE4

@misc{pith2026260705920,
  author       = {Pith},
  title        = {Pith review of: LibFHE: A Numba-Based CUDA-Python Library for Non-RNS CKKS-BGV Fully Homomorphic Encryption on GPUs},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/YKHXVVE4}},
  note         = {Machine review of arXiv:2607.05920}
}
read the original abstract

It has been a decade since the fourth-generation FHE framework, CKKS, was proposed; yet, there is still no indicator pointing toward a fifth-generation successor; and in recent years, numerous studies have explored GPU acceleration to improve the efficiency of homomorphic computations. In this paper, we propose LibFHE, a high-performance GPU-accelerated framework that features CUDA-Python bindings to achieve both high-level programmability and bare-metal GPU performance for homomorphic workloads. A large majority of state-of-the-art implementations adopt the RNS-CKKS variant. In contrast, this work deliberately revisits the original (non-RNS) CKKS-BGV framework, and develops a GPU-based implementation along with corresponding optimizations. Experimental results demonstrate that optimized CUDA-Python implementations can achieve performance comparable to highly optimized CPU-based C++ FHE libraries, while significantly reducing implementation complexity and improving programmability.

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