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Shuttling for Scalable Trapped-Ion Quantum Computers

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arxiv 2402.14065 v2 pith:ZA2U55IW submitted 2024-02-21 quant-ph

classification quant-ph
keywords quantumshuttlingapproachcomputersdeviceqccdtimearchitecture
verification ladder T0 review T1 audit T2 compute T3 formal
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Trapped-ion quantum computers exhibit promising potential to provide platforms for high-quality qubits and reliable quantum computation. The Quantum Charge Coupled Device (QCCD) architecture is a leading example that offers a modular solution to enable the realization of scalable quantum computers, paving the way for practical quantum algorithms with large qubit numbers. Within these devices, ions can be shuttled (moved) throughout the trap and through different dedicated zones, e.g., a memory zone for storage and a processing zone for the actual computation. However, due to decoherence of the ions' quantum states, the qubits lose their quantum information over time. Thus, the required time steps of shuttling operations should be minimized. In this work, we propose a heuristic approach to determining an efficient shuttling schedule, which orchestrates the movement operations within the device. Given a quantum algorithm and a device architecture, the proposed approach produces shuttling schedules with a close-to-minimal amount of time steps for small-size QCCD architectures. For large scale QCCD devices, empirical evaluations show promising results with respect to quality of the solution as well as performance. An implementation of the proposed approach is publicly available as part of the open-source Munich Quantum Toolkit (MQT) at https://github.com/cda-tum/mqt-ion-shuttler.

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Cited by 3 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

  1. Efficient Compilation for Shuttling Trapped-Ion Machines via the Position Graph Architectural Abstraction

    quant-ph 2025-01 unverdicted novelty 7.0 of 10

    Position graph abstraction plus SHAPER/SHAW heuristics enable shuttling-aware compilation on trapped-ion machines, succeeding on extreme cases where baselines fail and yielding 1.45x average (up to 4x) speedups.

  2. Architecting Scalable Trapped Ion Quantum Computers using Surface Codes

    quant-ph 2025-10 unverdicted novelty 6.0 of 10

    A new compiler for surface codes on QCCD trapped-ion hardware shows that 2-ion traps outperform larger traps in logical clock speed and hardware efficiency, beating prior compilers by 3.8X on average.

  3. Weakly Fault-Tolerant Computation in a Quantum Error-Detecting Code

    quant-ph 2024-08 unverdicted novelty 6.0 of 10

    Constructions for universal quantum computation in the [[n,n-2,2]] error-detecting code detect single-gate errors at computation end, providing weak fault tolerance with reduced overhead versus full error correction.

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