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arxiv: 2605.15874 · v1 · pith:ZXLPK6IZnew · submitted 2026-05-15 · 💻 cs.LG

Ti-iLSTM: A TinyDL Approach for Logic-Level Anomaly Detection in Industrial Water Treatment Systems

Mandar Joshi , Farzana Zahid , Judy Bowen , Matthew M.Y. Kuo , Valeriy Vyatkin , Emil Karlsson This is my paper

Pith reviewed 2026-05-20 20:33 UTC · model grok-4.3

classification 💻 cs.LG
keywords anomaly detectionindustrial control systemsTinyDLLSTMcyber-physical systemslogic-layer attacksSWaT datasetPLC security
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The pith

A memory-optimized incremental LSTM detects logic-layer anomalies in industrial water treatment by learning sequence patterns in process measurements.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper establishes that a TinyDL-optimized LSTM can identify logic-layer deception attacks in PLC-controlled water systems, where sensor values stay numerically plausible but causal relationships in the control process are broken. These attacks evade threshold checks and demand models too heavy for on-device use. The Ti-iLSTM variant reduces the memory and compute footprint of standard LSTM while retaining sequence-learning capability, yielding an F1-score of 0.983 and ROC-AUC of 0.998 on the SWaT dataset. A second validation pass on the WADI dataset shows the same lightweight framework continues to work without retraining from scratch. If correct, this removes the need for server-scale detectors and places logic-level protection directly inside resource-limited industrial controllers.

Core claim

The central claim is that combining logic-aware supervision with a space- and memory-optimized incremental LSTM produces an accurate anomaly detector that fits inside Programmable Logic Controllers. On the SWaT dataset the model reaches F1-score 0.983 and ROC-AUC 0.998; the same architecture, without major redesign, maintains usable performance on the independent WADI dataset.

What carries the argument

Ti-iLSTM, a TinyDL-based incremental LSTM that shrinks the memory and parameter footprint of standard LSTM so the network can run on-device inside PLCs while still learning temporal cause-and-effect violations from raw process measurements.

If this is right

  • Anomaly detection becomes feasible inside existing PLC hardware without additional servers or specialized chips.
  • Detection no longer requires hand-coded rules for every causal relationship in the process.
  • The same trained model transfers to a second industrial water-treatment testbed with only minor retraining.
  • Real-time response to stealthy attacks becomes possible at the edge rather than after data leaves the plant.
  • Memory and compute savings allow the detector to share the PLC with normal control logic.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same optimization pattern could be applied to other sequence models such as GRUs or transformers to further reduce size for even smaller controllers.
  • Adding a small amount of explicit rule information as auxiliary input might raise performance on anomalies that are still missed by pure sequence learning.
  • Deployment on actual PLC firmware would reveal whether the reported memory figures survive compilation and real-time scheduling constraints.
  • The method may generalize to other cyber-physical domains such as power grids or manufacturing lines that use similar PLC architectures.

Load-bearing premise

Logic-layer deception anomalies that keep measurements numerically plausible can still be spotted by sequence learning on those measurements alone, without any explicit model of the control rules.

What would settle it

A new test dataset containing logic anomalies whose measurement sequences closely mimic normal operation; if the model’s F1-score falls below 0.7 on this set while threshold-based detectors also fail, the sequence-only premise does not hold.

Figures

Figures reproduced from arXiv: 2605.15874 by Emil Karlsson, Farzana Zahid, Judy Bowen, Mandar Joshi, Matthew M.Y. Kuo, Valeriy Vyatkin.

Figure 1
Figure 1. Figure 1: Overview of the proposed Ti-iLSTM framework Based on these considerations, the aim of this study is to propose a novel TinyDL-based incremental LSTM (Ti￾iLSTM) framework that uses short time sequences of sensor and actuator data to detect logic-layer anomalies in PLC￾based IWTS. To achieve this, we address the following research questions: • RQ1: Which ML/DL-based anomaly detection ap￾proaches for IWTS are… view at source ↗
Figure 2
Figure 2. Figure 2: Data pre-processing during training phase even when individual values remain numerically plausible, if the joint behaviour violates expected operational depen￾dencies [24]. The primary dataset used in this work for training the model is the Secure Water Treatment (SWaT) testbed (July 2019 release (v2)) [36]. It is a publicly available bench￾mark that captures time-series measurements, logged at one￾second … view at source ↗
Figure 3
Figure 3. Figure 3: shows the incremental training workflow. The workflow consists of four steps: sequence builder, LSTM training, resource logging, and validation. Each of these steps repeat for each chunk until the final optimised model is obtained. In the first step, the processed (after data pre￾processing) data is divided into chunk and each data chunk is passed to the sequence builder. The sequence builder constructs ov… view at source ↗
Figure 4
Figure 4. Figure 4: Experimental evaluation and prediction workflow for Ti-iLSTM 4. Experimental Results and Discussion This section describes the datasets, execution platforms, model configuration, and evaluation metrics used to assess the proposed Ti-iLSTM framework. It aslo presents the detection performance of the proposed Ti-iLSTM frame￾work on the SWaT dataset, the effect of each light-weight design parameter, runtime r… view at source ↗
Figure 5
Figure 5. Figure 5: Features selection based on correlation filtering [PITH_FULL_IMAGE:figures/full_fig_p009_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: E8 threshold experiment (Threshold = 0.5): per￾formance (F1, ROC-AUC) and resource usage (RSS memory) across incremental update chunks on SWaT during training. that most anomalies are successfully detected, but this comes with a drop in precision to 0.9592, leading to more false alarms. On the other hand, a higher threshold of 0.9 improves precision to 0.9940, but recall drops significantly to 0.8910, mean… view at source ↗
Figure 7
Figure 7. Figure 7: Confusion matrix for the incremental LSTM on the SWaT test set [PITH_FULL_IMAGE:figures/full_fig_p012_7.png] view at source ↗
read the original abstract

Industrial Water Treatment Systems (IWTS) are safety critical cyber-physical infrastructures and due to increased connectivity, these systems are exposed to cyber threats that can manipulate process behaviour without creating obvious devices outliers. In particular, logic-layer deception anomalies can preserve numerically plausible measurements while breaking expected cause-and-effect relationships in the control process. These attacks are difficult to detect using threshold-based monitoring or require heavy server-oriented anomaly detection models. This paper explores the potential of Tiny Deep Learning (TinyDL) to provide lightweight on-device logic-level anomaly detection for resource constrained Programmable Logic Controllers (PLCs). We propose a novel framework, TinyDL-based incremental LSTM (Ti-iLSTM) which optimises the memory and space foot print of Long Short-Term Memory (LSTM), to detect logic-layer inconsistencies in Programmable Logic Controller (PLC) based Industrial Water Treatment Systems (IWTS). Experiments on the publicly available SWaT dataset show that the optimised model achieves high detection performance (F1-score=0.983 and ROC-AUC=0.998). A deployment-style validation on the WADI dataset confirms that the proposed light-weight framework remains applicable beyond a single dataset. The research demonstrates that combining logic-aware supervision with Tiny Deep Learning (TinyDL) sequence learning creates an efficient and accurate anomaly detection suitable for resource constrained Programmable Logic Controllers (PLCs) in industrial environments.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The paper proposes Ti-iLSTM, a Tiny Deep Learning optimized incremental LSTM for lightweight on-device detection of logic-layer deception anomalies in Industrial Water Treatment Systems (IWTS). These anomalies preserve numerically plausible sensor values while violating cause-and-effect relationships enforced by PLC control logic. The model is trained on process variable sequences from the SWaT dataset, achieving F1-score 0.983 and ROC-AUC 0.998, with deployment-style validation on the WADI dataset to demonstrate cross-dataset applicability for resource-constrained PLCs.

Significance. If the central claim holds, the work would demonstrate that TinyDL sequence models can perform logic-level anomaly detection without heavy server infrastructure, addressing a practical gap in securing safety-critical cyber-physical systems against deception attacks that evade threshold-based monitoring.

major comments (2)
  1. [Section 3] Section 3 (Ti-iLSTM architecture and training): The manuscript claims 'logic-aware supervision' is combined with TinyDL sequence learning, yet provides no description of how PLC control rules (e.g., interlock logic, actuator-state dependencies, or cause-effect constraints) are encoded, injected, or used as supervision signals. Without this mechanism, it remains unclear whether the reported performance reflects detection of logic violations or simply statistical outlier detection on temporal correlations.
  2. [Experiments] Experimental evaluation (SWaT and WADI results): High F1 and ROC-AUC values are presented, but the paper supplies no ablation studies, baseline comparisons against models that explicitly encode control logic, or error analysis of false positives on deception-style attacks. This leaves open whether the performance is attributable to the claimed logic-level capability or to standard sequence modeling.
minor comments (2)
  1. [Abstract] The abstract and introduction use the term 'logic-aware supervision' without a concise definition or forward reference to the section where the supervision procedure is specified.
  2. [Figures/Tables] Figure captions and table headings should explicitly state whether reported metrics are on the test set, validation set, or cross-dataset transfer to avoid ambiguity in the deployment-style validation claim.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for their constructive and detailed feedback. The comments identify key areas where additional clarification and experimental support are needed to strengthen the claims regarding logic-aware supervision and the attribution of performance to logic-level detection. We address each major comment below and will revise the manuscript accordingly.

read point-by-point responses

  1. Referee: [Section 3] Section 3 (Ti-iLSTM architecture and training): The manuscript claims 'logic-aware supervision' is combined with TinyDL sequence learning, yet provides no description of how PLC control rules (e.g., interlock logic, actuator-state dependencies, or cause-effect constraints) are encoded, injected, or used as supervision signals. Without this mechanism, it remains unclear whether the reported performance reflects detection of logic violations or simply statistical outlier detection on temporal correlations.

    Authors: We appreciate the referee highlighting this ambiguity. In the submitted manuscript, logic-aware supervision is implemented implicitly by training exclusively on normal operational sequences from SWaT that respect the underlying PLC control logic's cause-and-effect relationships; the incremental LSTM learns to model these expected temporal patterns, and anomalies are detected as deviations. No explicit rule injection into the architecture or loss function is performed. We agree that the current text does not sufficiently describe the data curation process that enforces these constraints. We will revise Section 3 to add a dedicated subsection explaining how interlock logic and actuator dependencies are used during dataset preparation and sequence construction, making clear that the approach relies on data-driven learning of logic-compliant patterns rather than symbolic rule encoding. revision: yes

  2. Referee: [Experiments] Experimental evaluation (SWaT and WADI results): High F1 and ROC-AUC values are presented, but the paper supplies no ablation studies, baseline comparisons against models that explicitly encode control logic, or error analysis of false positives on deception-style attacks. This leaves open whether the performance is attributable to the claimed logic-level capability or to standard sequence modeling.

    Authors: We acknowledge that the experimental section would benefit from stronger controls to isolate the contribution of the logic-aware aspect. The reported F1 and AUC are measured on SWaT deception attacks specifically constructed to violate cause-effect logic while preserving plausible values, with cross-dataset validation on WADI. To address the referee's concern, we will add ablation studies (e.g., non-incremental LSTM and non-TinyDL variants) and a baseline comparison against a lightweight rule-based checker that directly verifies actuator-sensor dependencies extracted from system documentation. We will also include a targeted error analysis of false positives on the deception attacks. These results and the corresponding discussion will be incorporated into the revised manuscript. revision: yes

Circularity Check

0 steps flagged

No significant circularity; results are experimental outcomes on public datasets

full rationale

The paper proposes Ti-iLSTM as an optimized incremental LSTM variant for anomaly detection and reports F1/ROC-AUC metrics from direct experiments on the SWaT and WADI datasets. No equations, derivations, or self-citations appear that reduce the claimed performance to fitted parameters by construction, self-definitional loops, or load-bearing prior work by the same authors. The central claims rest on empirical validation rather than any mathematical reduction to inputs.

Axiom & Free-Parameter Ledger

1 free parameters · 1 axioms · 1 invented entities

Abstract-only review yields very limited visibility into parameters and assumptions; the central claim rests on the unexamined premise that sequence models can capture logic inconsistencies from measurements alone.

free parameters (1)
  • LSTM optimization hyperparameters
    Memory and space footprint optimizations are mentioned but no specific values or selection process are given in the abstract.
axioms (1)
  • domain assumption Logic-layer deception anomalies preserve numerically plausible measurements while breaking expected cause-and-effect relationships
    Directly stated in the abstract as the defining property of the target attacks.
invented entities (1)
  • Ti-iLSTM no independent evidence
    purpose: TinyDL-optimized incremental LSTM for on-device logic anomaly detection
    Introduced as a novel framework without reference to external validation or prior independent evidence.

pith-pipeline@v0.9.0 · 5790 in / 1388 out tokens · 107607 ms · 2026-05-20T20:33:00.411231+00:00 · methodology

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Lean theorems connected to this paper

Citations machine-checked in the Pith Canon. Every link opens the source theorem in the public Lean library.

  • IndisputableMonolith/Cost/FunctionalEquation.lean washburn_uniqueness_aczel unclear
    ?
    unclear

    Relation between the paper passage and the cited Recognition theorem.

    We propose a novel framework, TinyDL-based incremental LSTM (Ti-iLSTM) which optimises the memory and space foot print of Long Short-Term Memory (LSTM), to detect logic-layer inconsistencies in Programmable Logic Controller (PLC) based Industrial Water Treatment Systems (IWTS).

  • IndisputableMonolith/Foundation/ArithmeticFromLogic.lean LogicNat induction and embed unclear
    ?
    unclear

    Relation between the paper passage and the cited Recognition theorem.

    anomaly labels are constructed without relying on dataset-provided attack annotations. The labels in this study are derived from interpretable process rules that capture violations of expected cause-and-effect relationships between sensors and actuators

What do these tags mean?
matches
The paper's claim is directly supported by a theorem in the formal canon.
supports
The theorem supports part of the paper's argument, but the paper may add assumptions or extra steps.
extends
The paper goes beyond the formal theorem; the theorem is a base layer rather than the whole result.
uses
The paper appears to rely on the theorem as machinery.
contradicts
The paper's claim conflicts with a theorem or certificate in the canon.
unclear
Pith found a possible connection, but the passage is too broad, indirect, or ambiguous to say the theorem truly supports the claim.

Reference graph

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