HSCO-Bench is the first end-to-end benchmark for LLM agents performing hardware-software co-design of heterogeneous SoCs, where only two of five frontier models produced valid FPGA prototypes that underutilized available hardware resources.
Computing’s energy problem (and what we can do about it)
9 Pith papers cite this work. Polarity classification is still indexing.
9
Pith papers citing it
representative citing papers
Adaptive-frequency resonate-and-fire neurons perform sample-by-sample spectral estimation for FMCW radar, with memory scaling by number of targets rather than signal length.
A 194M-parameter spiking dual-path model trained on 3B Chinese-English tokens achieves held-out PPL 8.88-8.93 at >89% per-element sparsity, trailing GPT-2 201M by 7.7% while showing that LIF temporal integration outperforms simple top-k masking at matched sparsity.
Proposes RV32I-derived ISA and novel addressing for IMPLY memristive in-memory computing microcontrollers, with simulation energy evaluation and environmental sensor case study.
BMRUs enable analog recurrent neural network hardware via discrete outputs that suppress noise 20-fold, with one-to-one parameter-to-circuit mapping and linear power scaling for recurrence.
Replacing pointwise convolutions with DWHT yields a model with 79.1% fewer parameters, 48.4% fewer FLOPs, and 1.49% higher accuracy than MobileNet-V1 on CIFAR-100.
Soft matter systems are modeled as information channels of increasing complexity, yielding a heuristic thermodynamic ceiling on information processing performance and a performance gap to biology attributed to per-element energy scales.
Nonlinear detuning stabilizes non-adiabatic magnonic dynamics in YIG:Co nanostructures, enabling low-occupancy resonant states with estimated 22 aJ switching energy.
KLR Hopfield networks exhibit robustness to quantization but sensitivity to pruning, interpreted as arising from dense bimodal parameterization of sparse input mappings.
citing papers explorer
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HSCO-Bench: An Agent-Driven End-to-End Hardware-Software Co-design Benchmark for Systems-on-Chip
HSCO-Bench is the first end-to-end benchmark for LLM agents performing hardware-software co-design of heterogeneous SoCs, where only two of five frontier models produced valid FPGA prototypes that underutilized available hardware resources.