SpikeMLLM is the first spike-based MLLM framework that maintains near-lossless performance under aggressive timestep compression and delivers 9x throughput and 25x power efficiency gains via a custom RTL accelerator.
et al.: The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing (Aug 2022), arXiv:2103.08392 [cs]
6 Pith papers cite this work. Polarity classification is still indexing.
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UniSpike eliminates address redundancy in spike packets via co-design of scheduling, runtime assembly hardware, and SNN partitioning, reporting 1.93x average traffic reduction, 1.77x speedup, and 1.50x energy improvement.
EdgeSpike delivers 91.4% mean accuracy on five sensing tasks with 31x lower energy on neuromorphic hardware and 6.3x longer battery life in a seven-month field deployment compared to conventional CNNs.
YANA delivers an accessible FPGA accelerator for spiking neural networks that shows near-linear inference scaling with sparsity and uses only 740 LUTs on the AMD Kria KR260 board.
CARLsim runs its full feature set on an RP2350 MCU with IEEE 16-bit floats, achieving 97.5% accuracy on a 1200-neuron Synfire4 benchmark and real-time operation at 20 mW for a 186-neuron version.
Digital neuromorphic chips encounter a new memory wall as on-chip memories dominate area and energy use, limiting competitiveness in edge applications without reorganized memory architectures.
citing papers explorer
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SpikeMLLM: Spike-based Multimodal Large Language Models via Modality-Specific Temporal Scales and Temporal Compression
SpikeMLLM is the first spike-based MLLM framework that maintains near-lossless performance under aggressive timestep compression and delivers 9x throughput and 25x power efficiency gains via a custom RTL accelerator.
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UniSpike: Accelerating Spiking Neural Networks on Neuromorphic Systems via Eliminating Address Redundancy
UniSpike eliminates address redundancy in spike packets via co-design of scheduling, runtime assembly hardware, and SNN partitioning, reporting 1.93x average traffic reduction, 1.77x speedup, and 1.50x energy improvement.
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EdgeSpike: Spiking Neural Networks for Low-Power Autonomous Sensing in Edge IoT Architectures
EdgeSpike delivers 91.4% mean accuracy on five sensing tasks with 31x lower energy on neuromorphic hardware and 6.3x longer battery life in a seven-month field deployment compared to conventional CNNs.
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YANA: Bridging the Neuromorphic Simulation-to-Hardware Gap
YANA delivers an accessible FPGA accelerator for spiking neural networks that shows near-linear inference scaling with sparsity and uses only 740 LUTs on the AMD Kria KR260 board.
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Full Feature Spiking Neural Network Simulation on Micro-Controllers for Neuromorphic Applications at the Edge
CARLsim runs its full feature set on an RP2350 MCU with IEEE 16-bit floats, achieving 97.5% accuracy on a 1200-neuron Synfire4 benchmark and real-time operation at 20 mW for a 186-neuron version.
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Memory Wall is not gone: A Critical Outlook on Memory Architecture in Digital Neuromorphic Computing
Digital neuromorphic chips encounter a new memory wall as on-chip memories dominate area and energy use, limiting competitiveness in edge applications without reorganized memory architectures.